diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
index 9550502..826e2b4 100644
--- a/arch/x86/cpu/start16.S
+++ b/arch/x86/cpu/start16.S
@@ -1,5 +1,5 @@
 /*
- *  U-boot - x86 Startup Code
+ *  U-Boot - x86 Startup Code
  *
  * (C) Copyright 2008-2011
  * Graeme Russ, <graeme.russ@gmail.com>
@@ -28,7 +28,7 @@
 	movl	$GD_FLG_COLD_BOOT, %ebx
 
 	xorl	%eax, %eax
-	movl	%eax, %cr3    /* Invalidate TLB */
+	movl	%eax, %cr3	/* Invalidate TLB */
 
 	/* Turn off cache (this might require a 486-class CPU) */
 	movl	%cr0, %eax
@@ -49,7 +49,7 @@
 	jmp	ff
 ff:
 
-	/* Finally restore BIST and jump to the 32bit initialization code */
+	/* Finally restore BIST and jump to the 32-bit initialization code */
 	movw	$code32start, %ax
 	movw	%ax, %bp
 	movl	%ecx, %eax
@@ -64,17 +64,17 @@
 	.word	0		/* limit */
 	.long	0		/* base */
 
-/*
- * The following Global Descriptor Table is just enough to get us into
- * 'Flat Protected Mode' - It will be discarded as soon as the final
- * GDT is setup in a safe location in RAM
- */
+	/*
+	 * The following Global Descriptor Table is just enough to get us into
+	 * 'Flat Protected Mode' - It will be discarded as soon as the final
+	 * GDT is setup in a safe location in RAM
+	 */
 gdt_ptr:
 	.word	0x1f		/* limit (31 bytes = 4 GDT entries - 1) */
 	.long	BOOT_SEG + gdt	/* base */
 
-/* Some CPUs are picky about GDT alignment... */
-.align 16
+	/* Some CPUs are picky about GDT alignment... */
+	.align	16
 gdt:
 	/*
 	 * The GDT table ...