diff --git a/MAINTAINERS b/MAINTAINERS
index 160f580..d6f78de 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -701,6 +701,10 @@
 
 	omap3_zoom2	ARM CORTEX-A8 (OMAP3xx SoC)
 
+John Rigby <jcrigby@gmail.com>
+
+	tx25		i.MX25
+
 Stefan Roese <sr@denx.de>
 
 	ixdpg425	xscale
diff --git a/Makefile b/Makefile
index ca399db..bd0151f 100644
--- a/Makefile
+++ b/Makefile
@@ -3100,6 +3100,10 @@
 		}
 	@$(MKCONFIG) -a $(call xtract_trab,$@) arm arm920t trab NULL s3c24x0
 
+tx25_config	: unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs tx25 karo mx25
+	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+
 VCMA9_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
 
diff --git a/board/karo/tx25/Makefile b/board/karo/tx25/Makefile
new file mode 100644
index 0000000..b0e610f
--- /dev/null
+++ b/board/karo/tx25/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2009 DENX Software Engineering
+# Author: John Rigby <jcrigby@gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= tx25.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
+
diff --git a/board/karo/tx25/config.mk b/board/karo/tx25/config.mk
new file mode 100644
index 0000000..732a14a
--- /dev/null
+++ b/board/karo/tx25/config.mk
@@ -0,0 +1,5 @@
+ifdef CONFIG_NAND_SPL
+TEXT_BASE = 0x81ec0000
+else
+TEXT_BASE = 0x81f00000
+endif
diff --git a/board/karo/tx25/lowlevel_init.S b/board/karo/tx25/lowlevel_init.S
new file mode 100644
index 0000000..823df10
--- /dev/null
+++ b/board/karo/tx25/lowlevel_init.S
@@ -0,0 +1,131 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * Author: John Rigby <jrigby@gmail.com>
+ *
+ * Based on U-Boot and RedBoot sources for several different i.mx
+ * platforms.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/macro.h>
+
+.macro init_aips
+	write32	0x43f00000, 0x77777777
+	write32	0x43f00004, 0x77777777
+	write32	0x43f00000, 0x77777777
+	write32	0x53f00004, 0x77777777
+.endm
+
+.macro init_max
+	write32	0x43f04000, 0x43210
+	write32	0x43f04100, 0x43210
+	write32	0x43f04200, 0x43210
+	write32	0x43f04300, 0x43210
+	write32	0x43f04400, 0x43210
+
+	write32	0x43f04010, 0x10
+	write32	0x43f04110, 0x10
+	write32	0x43f04210, 0x10
+	write32	0x43f04310, 0x10
+	write32	0x43f04410, 0x10
+
+	write32	0x43f04800, 0x0
+	write32	0x43f04900, 0x0
+	write32	0x43f04a00, 0x0
+	write32	0x43f04b00, 0x0
+	write32	0x43f04c00, 0x0
+.endm
+
+.macro init_m3if
+	write32 0xb8003000, 0x1
+.endm
+
+.macro init_clocks
+	/*
+	 * clocks
+	 *
+	 * first enable CLKO debug output
+	 * 0x40000000 enables the debug CLKO signal
+	 * 0x05000000 sets CLKO divider to 6
+	 * 0x00600000 makes CLKO parent clk the USB clk
+	 */
+	write32	0x53f80064, 0x45600000
+	write32	0x53f80008, 0x20034000
+
+	/*
+	 * enable all implemented clocks in all three
+	 * clock control registers
+	 */
+	write32	0x53f8000c, 0x1fffffff
+	write32	0x53f80010, 0xffffffff
+	write32	0x53f80014, 0xfdfff
+.endm
+
+.macro init_ddrtype
+	/*
+	 * ddr_type is 3.3v SDRAM
+	 */
+	write32	0x43fac454, 0x800
+.endm
+
+/*
+ * sdram controller init
+ */
+.macro init_sdram_bank bankaddr, ctl, cfg
+	ldr	r0, =0xb8001000
+	ldr	r2, =\bankaddr
+	/*
+	 * reset SDRAM controller
+	 * then wait for initialization to complete
+	 */
+	ldr	r1, =(1 << 1)
+	str	r1, [r0, #0x10]
+1:	ldr	r3, [r0, #0x10]
+	tst	r3, #(1 << 31)
+	beq	1b
+
+	ldr	r1, =0x95728
+	str	r1, [r0, #\cfg]		/* config */
+
+	ldr	r1, =0x92116480		/* control | precharge */
+	str	r1, [r0, #\ctl]		/* write command to controller */
+	str	r1, [r2, #0x400]	/* command encoded in address */
+
+	ldr	r1, =0xa2116480		/* auto refresh */
+	str	r1, [r0, #\ctl]
+	ldrb	r3, [r2]		/* read dram twice to auto refresh */
+	ldrb	r3, [r2]
+
+	ldr	r1, =0xb2116480		/* control | load mode */
+	str	r1, [r0, #\ctl]		/* write command to controller */
+	strb	r1, [r2, #0x33]		/* command encoded in address */
+
+	ldr	r1, =0x82116480		/* control  | normal (0)*/
+	str	r1, [r0, #\ctl]		/* write command to controller */
+.endm
+
+.globl lowlevel_init
+lowlevel_init:
+	init_aips
+	init_max
+	init_m3if
+	init_clocks
+
+	init_sdram_bank 0x80000000, 0x0, 0x4
+
+	init_sdram_bank 0x90000000, 0x8, 0xc
+	mov	pc, lr
diff --git a/board/karo/tx25/tx25.c b/board/karo/tx25/tx25.c
new file mode 100644
index 0000000..4d6a96d
--- /dev/null
+++ b/board/karo/tx25/tx25.c
@@ -0,0 +1,176 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * Author: John Rigby <jrigby@gmail.com>
+ *
+ * Based on imx27lite.c:
+ *   Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
+ *   Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
+ * And:
+ *   RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/imx25-pinmux.h>
+
+static void mdelay(int n)
+{
+	while (n-- > 0)
+		udelay(1000);
+}
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_FEC_MXC
+void tx25_fec_init(void)
+{
+	struct iomuxc_mux_ctl *muxctl;
+	struct iomuxc_pad_ctl *padctl;
+	u32 val;
+	u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
+	struct gpio_regs *gpio4 = (struct gpio_regs *)IMX_GPIO4_BASE;
+	struct gpio_regs *gpio3 = (struct gpio_regs *)IMX_GPIO3_BASE;
+	u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode;
+
+	debug("tx25_fec_init\n");
+	/*
+	 * fec pin init is generic
+	 */
+	mx25_fec_init_pins();
+
+	/*
+	 * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.
+	 *
+	 * FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13
+	 * FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11
+	 */
+	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
+
+	writel(gpio_mux_mode, &muxctl->pad_d13);
+	writel(gpio_mux_mode, &muxctl->pad_d11);
+
+	writel(0x0, &padctl->pad_d13);
+	writel(0x0, &padctl->pad_d11);
+
+	/* drop PHY power and assert reset (low) */
+	val = readl(&gpio4->dr) & ~((1 << 7) | (1 << 9));
+	writel(val, &gpio4->dr);
+	val = readl(&gpio4->dir) | (1 << 7) | (1 << 9);
+	writel(val, &gpio4->dir);
+
+	mdelay(5);
+
+	debug("resetting phy\n");
+
+	/* turn on PHY power leaving reset asserted */
+	val = readl(&gpio4->dr) | 1 << 9;
+	writel(val, &gpio4->dr);
+
+	mdelay(10);
+
+	/*
+	 * Setup some strapping pins that are latched by the PHY
+	 * as reset goes high.
+	 *
+	 * Set PHY mode to 111
+	 *  mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5
+	 *  mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5
+	 *  mode2 is tied high so nothing to do
+	 *
+	 * Turn on RMII mode
+	 *  RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
+	 */
+	/*
+	 * save three current mux modes and set each to gpio mode
+	 */
+	saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0);
+	saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1);
+	saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv);
+
+	writel(gpio_mux_mode, &muxctl->pad_fec_rdata0);
+	writel(gpio_mux_mode, &muxctl->pad_fec_rdata1);
+	writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv);
+
+	/*
+	 * set each to 1 and make each an output
+	 */
+	val = readl(&gpio3->dr) | (1 << 10) | (1 << 11) | (1 << 12);
+	writel(val, &gpio3->dr);
+	val = readl(&gpio3->dir) | (1 << 10) | (1 << 11) | (1 << 12);
+	writel(val, &gpio3->dir);
+
+	mdelay(22);		/* this value came from RedBoot */
+
+	/*
+	 * deassert PHY reset
+	 */
+	val = readl(&gpio4->dr) | 1 << 7;
+	writel(val, &gpio4->dr);
+	writel(val, &gpio4->dr);
+
+	mdelay(5);
+
+	/*
+	 * set FEC pins back
+	 */
+	writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0);
+	writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1);
+	writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv);
+}
+#else
+#define tx25_fec_init()
+#endif
+
+int board_init()
+{
+#ifdef CONFIG_MXC_UART
+	extern void mx25_uart_init_pins(void);
+
+	mx25_uart_init_pins();
+#endif
+	return 0;
+}
+
+int board_late_init(void)
+{
+	tx25_fec_init();
+	return 0;
+}
+
+int dram_init (void)
+{
+
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = get_ram_size((volatile void *)PHYS_SDRAM_1,
+			PHYS_SDRAM_1_SIZE);
+#if CONFIG_NR_DRAM_BANKS > 1
+	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+	gd->bd->bi_dram[1].size = get_ram_size((volatile void *)PHYS_SDRAM_2,
+			PHYS_SDRAM_2_SIZE);
+#endif
+
+	return 0;
+}
+
+int checkboard(void)
+{
+	printf("KARO TX25\n");
+	return 0;
+}
diff --git a/include/configs/tx25.h b/include/configs/tx25.h
new file mode 100644
index 0000000..c8188ca
--- /dev/null
+++ b/include/configs/tx25.h
@@ -0,0 +1,179 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * Author: John Rigby <jrigby@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+
+/*
+ * KARO TX25 board - SoC Configuration
+ */
+#define CONFIG_ARM926EJS			/* arm926ejs CPU core */
+#define CONFIG_MX25
+#define CONFIG_TX25
+#define CONFIG_MX25_CLK32		32000	/* OSC32K frequency */
+#define CONFIG_SYS_HZ			1000
+
+#define	CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* 256 kB for U-Boot */
+
+/* NAND BOOT is the only boot method */
+#define CONFIG_NAND_U_BOOT
+
+#ifdef CONFIG_NAND_SPL
+/* Start copying real U-boot from the second page */
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x800
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x30000
+/* Load U-Boot to this address */
+#define CONFIG_SYS_NAND_U_BOOT_DST	0x81f00000
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_SPARE_SIZE	64
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_SIZE		(128 * 1024 * 1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
+#else
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT
+#endif
+
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_INITRD_TAG		1
+
+/*
+ * Memory Info
+ */
+/* malloc() len */
+#define CONFIG_SYS_MALLOC_LEN		(1 << 20)	/* 1 MiB */
+/* reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+/*
+ * Board has 2 32MB banks of DRAM but there is a bug when using
+ * both so only the first is configured
+ */
+#define CONFIG_NR_DRAM_BANKS	1
+
+#define PHYS_SDRAM_1		0x80000000
+#define PHYS_SDRAM_1_SIZE	0x02000000
+#if (CONFIG_NR_DRAM_BANKS == 2)
+#define PHYS_SDRAM_2		0x90000000
+#define PHYS_SDRAM_2_SIZE	0x02000000
+#endif
+/* 8MB DRAM test */
+#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
+#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1+0x0800000)
+#define CONFIG_STACKSIZE	(256 * 1024)	/* regular stack */
+
+/*
+ * Serial Info
+ */
+#define CONFIG_MXC_UART		1
+#define CONFIG_SYS_MX25_UART1	1
+#define CONFIG_CONS_INDEX	1	/* use UART0 for console */
+#define CONFIG_BAUDRATE		115200	/* Default baud rate */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Flash & Environment
+ */
+/* No NOR flash present */
+#define CONFIG_SYS_NO_FLASH	1
+#define	CONFIG_ENV_IS_IN_NAND
+#define	CONFIG_ENV_OFFSET	CONFIG_SYS_MONITOR_LEN
+#define CONFIG_ENV_SIZE		(128 * 1024)	/* 128 kB NAND block size */
+#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+
+/* NAND */
+#define CONFIG_NAND_MXC
+#define CONFIG_NAND_MXC_V1_1
+#define CONFIG_MXC_NAND_REGS_BASE	(0xBB000000)
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		(0xBB000000)
+#define CONFIG_JFFS2_NAND
+#define CONFIG_MXC_NAND_HWECC
+#define CONFIG_SYS_NAND_LARGEPAGE
+
+#define CONFIG_SYS_64BIT_VSPRINTF
+
+/* U-Boot general configuration */
+#define CONFIG_SYS_PROMPT	"=> "	/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size  */
+/* Print buffer sz */
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
+		sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS	32	/* max number of command args */
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+
+/* U-Boot commands */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_NAND
+
+/*
+ * Ethernet
+ */
+#define CONFIG_FEC_MXC
+#define CONFIG_FEC_MXC_PHYADDR		0x1f
+#define CONFIG_MII
+#define CONFIG_CMD_NET
+#define CONFIG_NET_MULTI
+#define BOARD_LATE_INIT
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BOOTDELAY	5
+
+#define CONFIG_LOADADDR		0x81000000	/* loadaddr env var */
+#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+
+#define xstr(s)	str(s)
+#define str(s)	#s
+
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"netdev=eth0\0"							\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=${serverip}:${rootpath}\0"			\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"addip=setenv bootargs ${bootargs} "				\
+		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
+		":${hostname}:${netdev}:off panic=1\0"			\
+	"addtty=setenv bootargs ${bootargs}"				\
+		" console=ttymxc0,${baudrate}\0"			\
+	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
+	"addmisc=setenv bootargs ${bootargs}\0"				\
+	"u-boot=tx25/u-boot.bin\0"					\
+	"kernel_addr_r=" xstr(CONFIG_LOADADDR) "\0"			\
+	"hostname=tx25\0"						\
+	"bootfile=tx25/uImage\0"					\
+	"rootpath=/opt/eldk/arm\0"					\
+	"net_nfs=tftp ${kernel_addr_r} ${bootfile};"			\
+		"run nfsargs addip addtty addmtd addmisc;"		\
+		"bootm\0"						\
+	"bootcmd=run net_nfs\0"						\
+	"load=tftp ${loadaddr} ${u-boot}\0"				\
+	"update=nand erase 0 40000;nand write ${loadaddr} 0 40000\0"	\
+	"upd=run load update\0"						\
+
+#endif /* __CONFIG_H */
diff --git a/nand_spl/board/karo/tx25/Makefile b/nand_spl/board/karo/tx25/Makefile
new file mode 100644
index 0000000..ae71f66
--- /dev/null
+++ b/nand_spl/board/karo/tx25/Makefile
@@ -0,0 +1,78 @@
+#
+# (C) Copyright 2009 DENX Software Engineering
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundatio; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+CONFIG_NAND_SPL	= y
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS	= -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS	+= -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
+CFLAGS	+= -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
+
+SOBJS	= start.o lowlevel_init.o
+COBJS	= nand_boot_fsl_nfc.o
+
+SRCS	:= $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
+SRCS	+= $(SRCTREE)/cpu/arm926ejs/start.S
+SRCS	+= $(SRCTREE)/board/karo/tx25/lowlevel_init.S
+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj	:= $(OBJTREE)/nand_spl/
+
+ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+all:	$(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot.lds
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+		-Map $(nandobj)u-boot-spl.map \
+		-o $@
+
+$(nandobj)u-boot.lds: $(LDSCRIPT)
+	$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
+
+#########################################################################
+
+$(obj)%.o:	$(SRCTREE)/cpu/arm926ejs/%.S
+	$(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o:	$(SRCTREE)/board/karo/tx25/%.S
+	$(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o:	$(SRCTREE)/nand_spl/%.c
+	$(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/karo/tx25/config.mk b/nand_spl/board/karo/tx25/config.mk
new file mode 100644
index 0000000..68afbf1
--- /dev/null
+++ b/nand_spl/board/karo/tx25/config.mk
@@ -0,0 +1 @@
+PAD_TO	:= 2048
diff --git a/nand_spl/board/karo/tx25/u-boot.lds b/nand_spl/board/karo/tx25/u-boot.lds
new file mode 100644
index 0000000..423bed3
--- /dev/null
+++ b/nand_spl/board/karo/tx25/u-boot.lds
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2009
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text :
+	{
+		start.o			(.text)
+		lowlevel_init.o		(.text)
+		nand_boot_fsl_nfc.o	(.text)
+		*(.text)
+		. = 2K;
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}