| commit | 11d7a5b81bb4bcea027ed4556e971294b9e867a1 | [log] [tgz] |
|---|---|---|
| author | Simon Glass <sjg@chromium.org> | Wed Apr 17 16:13:36 2013 +0000 |
| committer | Simon Glass <sjg@chromium.org> | Mon May 13 13:33:21 2013 -0700 |
| tree | cbd44285af8784933d8c09caba2f0f8208d1856b | |
| parent | bcc28da58f45c7fd60664c7b69a021524858a951 [diff] |
x86: Add TSC timer This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org>