Cache update and added CFG_UNIFY_CACHE
Enabled cache in cpu_init_f() for faster flash to mem allocation. Updated cache handling in start.S. Applied cache invalidate in fec_send() and fec_recv(). Added CFG_UNIFY_CACHE for CF V3 only.
Signed-off-by: TsiChung <tcliew@Goku.(none)>
diff --git a/cpu/mcf532x/cpu_init.c b/cpu/mcf532x/cpu_init.c
index b056fbe..32711a1 100644
--- a/cpu/mcf532x/cpu_init.c
+++ b/cpu/mcf532x/cpu_init.c
@@ -113,6 +113,8 @@
fbcs->cscr5 = CFG_CS5_CTRL;
fbcs->csmr5 = CFG_CS5_MASK;
#endif
+
+ icache_enable();
}
/*
@@ -120,6 +122,5 @@
*/
int cpu_init_r(void)
{
- icache_enable();
return (0);
}
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
index acd3494..ac44aaa 100644
--- a/cpu/mcf532x/start.S
+++ b/cpu/mcf532x/start.S
@@ -270,8 +270,6 @@
movec %d0, %CACR /* Invalidate cache */
move.l #(CFG_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
movec %d0, %ACR0 /* Enable cache */
- move.l #(CFG_CS0_BASE + 0x0000), %d0 /* Setup cache mask */
- movec %d0, %ACR1 /* Enable cache */
move.l #0x80000200, %d0 /* Setup cache mask */
movec %d0, %CACR /* Enable cache */
@@ -284,11 +282,11 @@
.globl icache_disable
icache_disable:
- move.l #0x00000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
+ move.l #0x01000000, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Disable cache */
clr.l %d0 /* Setup cache mask */
- movec %d0, %ACR0 /* Enable cache */
- movec %d0, %ACR1 /* Enable cache */
+ movec %d0, %ACR0
+ movec %d0, %ACR1
move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
moveq #0, %d0
@@ -303,7 +301,7 @@
.globl icache_invalid
icache_invalid:
- move.l #0x01000000, %d0 /* Setup cache mask */
+ move.l #0x81000200, %d0 /* Setup cache mask */
movec %d0, %CACR /* Enable cache */
rts