| commit | cbec2b83f31f70fcb3520a42578b5cc691722e35 | [log] [tgz] |
|---|---|---|
| author | Thomas Schaefer <thomas.schaefer@kontron.com> | Thu Aug 08 16:00:30 2019 +0800 |
| committer | Priyanka Jain <priyanka.jain@nxp.com> | Thu Sep 12 16:15:42 2019 +0530 |
| tree | 735120c061fb9ac67ac4acf15946a7f245418ebd | |
| parent | 679cd5407616239012ca2d294ac81ec0a7d56d69 [diff] |
armv8: ls1028a: configure PMU's PCTBENR to enable WDT The SP805-WDT module on LS1028A requires configuration of PMU's PCTBENR register to enable watchdog counter decrement and reset signal generation. The watchdog clock needs to be enabled first. Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>