Merge branch '2023-02-07-assorted-updates'
- Default to dynamic LMB allocation, and fix an issue with the EFI one,
assorted TI platform updates, socrates platform updates, switch
qemu-arm to using bootstd, imagetool fixes, macOS host build fixes,
keymile platform upates, spl FPGA load fix, MMC env bugfix, add seama
command, usb bootdev test bugfix.
diff --git a/MAINTAINERS b/MAINTAINERS
index d9c959b..b9c505d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -844,7 +844,7 @@
COLDFIRE
M: Huan Wang <alison.wang@nxp.com>
-M: Angelo Dureghello <angelo@sysam.it>
+M: Angelo Dureghello <angelo@kernel-space.org>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-coldfire.git
F: arch/m68k/
@@ -1331,6 +1331,13 @@
F: doc/arch/sandbox.rst
F: include/dt-bindings/*/sandbox*.h
+SEAMA
+M: Linus Walleij <linus.walleij@linaro.org>
+S: Maintained
+F: cmd/seama.c
+F: doc/usage/cmd/seama.rst
+F: test/cmd/seama.c
+
SEMIHOSTING
R: Sean Anderson <sean.anderson@seco.com>
S: Orphaned
diff --git a/Makefile b/Makefile
index 7eaf454..518ad39 100644
--- a/Makefile
+++ b/Makefile
@@ -318,8 +318,8 @@
#
ifeq ($(HOSTOS),darwin)
# get major and minor product version (e.g. '10' and '6' for Snow Leopard)
-DARWIN_MAJOR_VERSION = $(shell sw_vers -productVersion | cut -f 1 -d '.')
-DARWIN_MINOR_VERSION = $(shell sw_vers -productVersion | cut -f 2 -d '.')
+DARWIN_MAJOR_VERSION := $(shell sw_vers -productVersion | cut -f 1 -d '.')
+DARWIN_MINOR_VERSION := $(shell sw_vers -productVersion | cut -f 2 -d '.')
os_x_before = $(shell if [ $(DARWIN_MAJOR_VERSION) -le $(1) -a \
$(DARWIN_MINOR_VERSION) -le $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
@@ -1190,19 +1190,22 @@
u-boot.bin: u-boot-fit-dtb.bin FORCE
$(call if_changed,copy)
+ifneq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
$(call if_changed,cat)
+endif
else ifeq ($(CONFIG_OF_SEPARATE).$(CONFIG_OF_OMIT_DTB),y.)
+
+ifneq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
$(call if_changed,cat)
+endif
-ifneq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
u-boot.bin: u-boot-dtb.bin FORCE
$(call if_changed,copy)
-endif
-else ifneq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
+else
u-boot.bin: u-boot-nodtb.bin FORCE
$(call if_changed,copy)
endif
@@ -1581,7 +1584,7 @@
endif
ifeq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
-u-boot.bin: u-boot-nodtb.bin u-boot.dtb u-boot-br.bin FORCE
+u-boot-dtb.bin: u-boot-nodtb.bin u-boot.dtb u-boot-br.bin FORCE
$(call if_changed,binman)
OBJCOPYFLAGS_u-boot-br.bin := -O binary -j .bootpg -j .resetvec
diff --git a/README b/README
index edce789..9cc0c98 100644
--- a/README
+++ b/README
@@ -1810,6 +1810,7 @@
base - print or set address offset
printenv- print environment variables
pwm - control pwm channels
+seama - load SEAMA NAND image
setenv - set environment variables
saveenv - save environment variables to persistent storage
protect - enable or disable FLASH write protection
diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
index 57b0f53..5e8036f 100644
--- a/arch/arm/dts/k3-am64-main.dtsi
+++ b/arch/arm/dts/k3-am64-main.dtsi
@@ -59,7 +59,10 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
- <0x00 0x01840000 0x00 0xC0000>; /* GICR */
+ <0x00 0x01840000 0x00 0xC0000>, /* GICR */
+ <0x01 0x00000000 0x00 0x2000>, /* GICC */
+ <0x01 0x00010000 0x00 0x1000>, /* GICH */
+ <0x01 0x00020000 0x00 0x2000>; /* GICV */
/*
* vcpumntirq:
* virtual CPU interface maintenance interrupt
@@ -171,7 +174,7 @@
compatible = "ti,k2g-sci";
ti,host-id = <12>;
mbox-names = "rx", "tx";
- mboxes= <&secure_proxy_main 12>,
+ mboxes = <&secure_proxy_main 12>,
<&secure_proxy_main 13>;
reg-names = "debug_messages";
reg = <0x00 0x44043000 0x00 0xfe0>;
@@ -217,6 +220,12 @@
reg = <0x4044 0x8>;
#phy-cells = <1>;
};
+
+ epwm_tbclk: clock@4140 {
+ compatible = "ti,am64-epwm-tbclk", "syscon";
+ reg = <0x4130 0x4>;
+ #clock-cells = <1>;
+ };
};
main_uart0: serial@2800000 {
@@ -228,6 +237,7 @@
power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 146 0>;
clock-names = "fclk";
+ status = "disabled";
};
main_uart1: serial@2810000 {
@@ -239,6 +249,7 @@
power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 152 0>;
clock-names = "fclk";
+ status = "disabled";
};
main_uart2: serial@2820000 {
@@ -250,6 +261,7 @@
power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 153 0>;
clock-names = "fclk";
+ status = "disabled";
};
main_uart3: serial@2830000 {
@@ -261,6 +273,7 @@
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 154 0>;
clock-names = "fclk";
+ status = "disabled";
};
main_uart4: serial@2840000 {
@@ -272,6 +285,7 @@
power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 155 0>;
clock-names = "fclk";
+ status = "disabled";
};
main_uart5: serial@2850000 {
@@ -283,6 +297,7 @@
power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 156 0>;
clock-names = "fclk";
+ status = "disabled";
};
main_uart6: serial@2860000 {
@@ -294,6 +309,7 @@
power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 158 0>;
clock-names = "fclk";
+ status = "disabled";
};
main_i2c0: i2c@20000000 {
@@ -305,6 +321,7 @@
power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 102 2>;
clock-names = "fck";
+ status = "disabled";
};
main_i2c1: i2c@20010000 {
@@ -316,6 +333,7 @@
power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 103 2>;
clock-names = "fck";
+ status = "disabled";
};
main_i2c2: i2c@20020000 {
@@ -327,6 +345,7 @@
power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 104 2>;
clock-names = "fck";
+ status = "disabled";
};
main_i2c3: i2c@20030000 {
@@ -338,6 +357,7 @@
power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 105 2>;
clock-names = "fck";
+ status = "disabled";
};
main_spi0: spi@20100000 {
@@ -350,6 +370,7 @@
clocks = <&k3_clks 141 0>;
dmas = <&main_pktdma 0xc300 0>, <&main_pktdma 0x4300 0>;
dma-names = "tx0", "rx0";
+ status = "disabled";
};
main_spi1: spi@20110000 {
@@ -360,6 +381,7 @@
#size-cells = <0>;
power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 142 0>;
+ status = "disabled";
};
main_spi2: spi@20120000 {
@@ -370,6 +392,7 @@
#size-cells = <0>;
power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 143 0>;
+ status = "disabled";
};
main_spi3: spi@20130000 {
@@ -380,6 +403,7 @@
#size-cells = <0>;
power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 144 0>;
+ status = "disabled";
};
main_spi4: spi@20140000 {
@@ -390,6 +414,7 @@
#size-cells = <0>;
power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 145 0>;
+ status = "disabled";
};
main_gpio_intr: interrupt-controller@a00000 {
@@ -447,13 +472,11 @@
clock-names = "clk_ahb", "clk_xin";
mmc-ddr-1_8v;
mmc-hs200-1_8v;
- mmc-hs400-1_8v;
ti,trm-icp = <0x2>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-ddr52 = <0x6>;
ti,otap-del-sel-hs200 = <0x7>;
- ti,otap-del-sel-hs400 = <0x4>;
};
sdhci1: mmc@fa00000 {
@@ -529,6 +552,7 @@
clocks = <&k3_clks 13 0>;
clock-names = "fck";
bus_freq = <1000000>;
+ status = "disabled";
};
cpts@3d000 {
@@ -543,7 +567,7 @@
};
};
- cpts@39000000 {
+ main_cpts0: cpts@39000000 {
compatible = "ti,j721e-cpts";
reg = <0x0 0x39000000 0x0 0x400>;
reg-names = "cpts";
@@ -558,6 +582,14 @@
ti,cpts-ext-ts-inputs = <8>;
};
+ timesync_router: pinctrl@a40000 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0xa40000 0x0 0x800>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x000107ff>;
+ };
+
usbss0: cdns-usb@f900000{
compatible = "ti,am64-usb";
reg = <0x00 0xf900000 0x00 0x100>;
@@ -597,7 +629,7 @@
assigned-clocks = <&k3_clks 0 0>;
assigned-clock-parents = <&k3_clks 0 3>;
assigned-clock-rates = <60000000>;
- clock-names = "adc_tsc_fck";
+ clock-names = "fck";
adc {
#io-channel-cells = <1>;
@@ -840,6 +872,7 @@
ranges = <0x01000000 0x00 0x68001000 0x00 0x68001000 0x00 0x0010000>,
<0x02000000 0x00 0x68011000 0x00 0x68011000 0x00 0x7fef000>;
dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
+ status = "disabled";
};
pcie0_ep: pcie-ep@f102000 {
@@ -858,23 +891,505 @@
clocks = <&k3_clks 114 0>;
clock-names = "fck";
max-functions = /bits/ 8 <1>;
+ status = "disabled";
+ };
+
+ epwm0: pwm@23000000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23000000 0x0 0x100>;
+ power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ epwm1: pwm@23010000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23010000 0x0 0x100>;
+ power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ epwm2: pwm@23020000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23020000 0x0 0x100>;
+ power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ epwm3: pwm@23030000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23030000 0x0 0x100>;
+ power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 3>, <&k3_clks 89 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
};
+ epwm4: pwm@23040000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23040000 0x0 0x100>;
+ power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 4>, <&k3_clks 90 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ epwm5: pwm@23050000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23050000 0x0 0x100>;
+ power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 5>, <&k3_clks 91 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ epwm6: pwm@23060000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23060000 0x0 0x100>;
+ power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 6>, <&k3_clks 92 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ epwm7: pwm@23070000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23070000 0x0 0x100>;
+ power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 7>, <&k3_clks 93 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ epwm8: pwm@23080000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23080000 0x0 0x100>;
+ power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 8>, <&k3_clks 94 0>;
+ clock-names = "tbclk", "fck";
+ status = "disabled";
+ };
+
+ ecap0: pwm@23100000 {
+ compatible = "ti,am64-ecap", "ti,am3352-ecap";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23100000 0x0 0x60>;
+ power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 51 0>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+
+ ecap1: pwm@23110000 {
+ compatible = "ti,am64-ecap", "ti,am3352-ecap";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23110000 0x0 0x60>;
+ power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 52 0>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+
+ ecap2: pwm@23120000 {
+ compatible = "ti,am64-ecap", "ti,am3352-ecap";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23120000 0x0 0x60>;
+ power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 53 0>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+
main_rti0: watchdog@e000000 {
- compatible = "ti,j7-rti-wdt";
- reg = <0x00 0xe000000 0x00 0x100>;
- clocks = <&k3_clks 125 0>;
- power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
- assigned-clocks = <&k3_clks 125 0>;
- assigned-clock-parents = <&k3_clks 125 2>;
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0xe000000 0x00 0x100>;
+ clocks = <&k3_clks 125 0>;
+ power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 125 0>;
+ assigned-clock-parents = <&k3_clks 125 2>;
};
main_rti1: watchdog@e010000 {
- compatible = "ti,j7-rti-wdt";
- reg = <0x00 0xe010000 0x00 0x100>;
- clocks = <&k3_clks 126 0>;
- power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
- assigned-clocks = <&k3_clks 126 0>;
- assigned-clock-parents = <&k3_clks 126 2>;
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0xe010000 0x00 0x100>;
+ clocks = <&k3_clks 126 0>;
+ power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 126 0>;
+ assigned-clock-parents = <&k3_clks 126 2>;
+ };
+
+ icssg0: icssg@30000000 {
+ compatible = "ti,am642-icssg";
+ reg = <0x00 0x30000000 0x00 0x80000>;
+ power-domains = <&k3_pds 81 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x00 0x30000000 0x80000>;
+
+ icssg0_mem: memories@0 {
+ reg = <0x0 0x2000>,
+ <0x2000 0x2000>,
+ <0x10000 0x10000>;
+ reg-names = "dram0", "dram1", "shrdram2";
+ };
+
+ icssg0_cfg: cfg@26000 {
+ compatible = "ti,pruss-cfg", "syscon";
+ reg = <0x26000 0x200>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x26000 0x2000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ icssg0_coreclk_mux: coreclk-mux@3c {
+ reg = <0x3c>;
+ #clock-cells = <0>;
+ clocks = <&k3_clks 81 0>, /* icssg0_core_clk */
+ <&k3_clks 81 20>; /* icssg0_iclk */
+ assigned-clocks = <&icssg0_coreclk_mux>;
+ assigned-clock-parents = <&k3_clks 81 20>;
+ };
+
+ icssg0_iepclk_mux: iepclk-mux@30 {
+ reg = <0x30>;
+ #clock-cells = <0>;
+ clocks = <&k3_clks 81 3>, /* icssg0_iep_clk */
+ <&icssg0_coreclk_mux>; /* icssg0_coreclk_mux */
+ assigned-clocks = <&icssg0_iepclk_mux>;
+ assigned-clock-parents = <&icssg0_coreclk_mux>;
+ };
+ };
+ };
+
+ icssg0_mii_rt: mii-rt@32000 {
+ compatible = "ti,pruss-mii", "syscon";
+ reg = <0x32000 0x100>;
+ };
+
+ icssg0_mii_g_rt: mii-g-rt@33000 {
+ compatible = "ti,pruss-mii-g", "syscon";
+ reg = <0x33000 0x1000>;
+ };
+
+ icssg0_intc: interrupt-controller@20000 {
+ compatible = "ti,icssg-intc";
+ reg = <0x20000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host_intr0", "host_intr1",
+ "host_intr2", "host_intr3",
+ "host_intr4", "host_intr5",
+ "host_intr6", "host_intr7";
+ };
+
+ pru0_0: pru@34000 {
+ compatible = "ti,am642-pru";
+ reg = <0x34000 0x3000>,
+ <0x22000 0x100>,
+ <0x22400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-pru0_0-fw";
+ };
+
+ rtu0_0: rtu@4000 {
+ compatible = "ti,am642-rtu";
+ reg = <0x4000 0x2000>,
+ <0x23000 0x100>,
+ <0x23400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-rtu0_0-fw";
+ };
+
+ tx_pru0_0: txpru@a000 {
+ compatible = "ti,am642-tx-pru";
+ reg = <0xa000 0x1800>,
+ <0x25000 0x100>,
+ <0x25400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-txpru0_0-fw";
+ };
+
+ pru0_1: pru@38000 {
+ compatible = "ti,am642-pru";
+ reg = <0x38000 0x3000>,
+ <0x24000 0x100>,
+ <0x24400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-pru0_1-fw";
+ };
+
+ rtu0_1: rtu@6000 {
+ compatible = "ti,am642-rtu";
+ reg = <0x6000 0x2000>,
+ <0x23800 0x100>,
+ <0x23c00 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-rtu0_1-fw";
+ };
+
+ tx_pru0_1: txpru@c000 {
+ compatible = "ti,am642-tx-pru";
+ reg = <0xc000 0x1800>,
+ <0x25800 0x100>,
+ <0x25c00 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-txpru0_1-fw";
+ };
+
+ icssg0_mdio: mdio@32400 {
+ compatible = "ti,davinci_mdio";
+ reg = <0x32400 0x100>;
+ clocks = <&k3_clks 62 3>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus_freq = <1000000>;
+ status = "disabled";
+ };
+ };
+
+ icssg1: icssg@30080000 {
+ compatible = "ti,am642-icssg";
+ reg = <0x00 0x30080000 0x00 0x80000>;
+ power-domains = <&k3_pds 82 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x00 0x30080000 0x80000>;
+
+ icssg1_mem: memories@0 {
+ reg = <0x0 0x2000>,
+ <0x2000 0x2000>,
+ <0x10000 0x10000>;
+ reg-names = "dram0", "dram1", "shrdram2";
+ };
+
+ icssg1_cfg: cfg@26000 {
+ compatible = "ti,pruss-cfg", "syscon";
+ reg = <0x26000 0x200>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x26000 0x2000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ icssg1_coreclk_mux: coreclk-mux@3c {
+ reg = <0x3c>;
+ #clock-cells = <0>;
+ clocks = <&k3_clks 82 0>, /* icssg1_core_clk */
+ <&k3_clks 82 20>; /* icssg1_iclk */
+ assigned-clocks = <&icssg1_coreclk_mux>;
+ assigned-clock-parents = <&k3_clks 82 20>;
+ };
+
+ icssg1_iepclk_mux: iepclk-mux@30 {
+ reg = <0x30>;
+ #clock-cells = <0>;
+ clocks = <&k3_clks 82 3>, /* icssg1_iep_clk */
+ <&icssg1_coreclk_mux>; /* icssg1_coreclk_mux */
+ assigned-clocks = <&icssg1_iepclk_mux>;
+ assigned-clock-parents = <&icssg1_coreclk_mux>;
+ };
+ };
+ };
+
+ icssg1_mii_rt: mii-rt@32000 {
+ compatible = "ti,pruss-mii", "syscon";
+ reg = <0x32000 0x100>;
+ };
+
+ icssg1_mii_g_rt: mii-g-rt@33000 {
+ compatible = "ti,pruss-mii-g", "syscon";
+ reg = <0x33000 0x1000>;
+ };
+
+ icssg1_intc: interrupt-controller@20000 {
+ compatible = "ti,icssg-intc";
+ reg = <0x20000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host_intr0", "host_intr1",
+ "host_intr2", "host_intr3",
+ "host_intr4", "host_intr5",
+ "host_intr6", "host_intr7";
+ };
+
+ pru1_0: pru@34000 {
+ compatible = "ti,am642-pru";
+ reg = <0x34000 0x4000>,
+ <0x22000 0x100>,
+ <0x22400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-pru1_0-fw";
+ };
+
+ rtu1_0: rtu@4000 {
+ compatible = "ti,am642-rtu";
+ reg = <0x4000 0x2000>,
+ <0x23000 0x100>,
+ <0x23400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-rtu1_0-fw";
+ };
+
+ tx_pru1_0: txpru@a000 {
+ compatible = "ti,am642-tx-pru";
+ reg = <0xa000 0x1800>,
+ <0x25000 0x100>,
+ <0x25400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-txpru1_0-fw";
+ };
+
+ pru1_1: pru@38000 {
+ compatible = "ti,am642-pru";
+ reg = <0x38000 0x4000>,
+ <0x24000 0x100>,
+ <0x24400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-pru1_1-fw";
+ };
+
+ rtu1_1: rtu@6000 {
+ compatible = "ti,am642-rtu";
+ reg = <0x6000 0x2000>,
+ <0x23800 0x100>,
+ <0x23c00 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-rtu1_1-fw";
+ };
+
+ tx_pru1_1: txpru@c000 {
+ compatible = "ti,am642-tx-pru";
+ reg = <0xc000 0x1800>,
+ <0x25800 0x100>,
+ <0x25c00 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am64x-txpru1_1-fw";
+ };
+
+ icssg1_mdio: mdio@32400 {
+ compatible = "ti,davinci_mdio";
+ reg = <0x32400 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&k3_clks 82 0>;
+ clock-names = "fck";
+ bus_freq = <1000000>;
+ status = "disabled";
+ };
+ };
+
+ main_mcan0: can@20701000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x20701000 0x00 0x200>,
+ <0x00 0x20708000 0x00 0x8000>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 98 5>, <&k3_clks 98 0>;
+ clock-names = "hclk", "cclk";
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ main_mcan1: can@20711000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x20711000 0x00 0x200>,
+ <0x00 0x20718000 0x00 0x8000>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 99 5>, <&k3_clks 99 0>;
+ clock-names = "hclk", "cclk";
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ crypto: crypto@40900000 {
+ compatible = "ti,am64-sa2ul";
+ reg = <0x00 0x40900000 0x00 0x1200>;
+ power-domains = <&k3_pds 133 TI_SCI_PD_SHARED>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
+ dmas = <&main_pktdma 0xc001 0>, <&main_pktdma 0x4002 0>,
+ <&main_pktdma 0x4003 0>;
+ dma-names = "tx", "rx1", "rx2";
+
+ rng: rng@40910000 {
+ compatible = "inside-secure,safexcel-eip76";
+ reg = <0x00 0x40910000 0x00 0x7d>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled"; /* Used by OP-TEE */
+ };
+ };
+
+ gpmc0: memory-controller@3b000000 {
+ compatible = "ti,am64-gpmc";
+ power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 80 0>;
+ clock-names = "fck";
+ reg = <0x00 0x3b000000 0x00 0x400>,
+ <0x00 0x50000000 0x00 0x8000000>;
+ reg-names = "cfg", "data";
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ gpmc,num-cs = <3>;
+ gpmc,num-waitpins = <2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ status = "disabled";
+ };
+
+ elm0: ecc@25010000 {
+ compatible = "ti,am64-elm";
+ reg = <0x00 0x25010000 0x00 0x2000>;
+ interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 54 0>;
+ clock-names = "fck";
+ status = "disabled";
};
};
diff --git a/arch/arm/dts/k3-am64-mcu.dtsi b/arch/arm/dts/k3-am64-mcu.dtsi
index 2bb5c9f..38ddf0b 100644
--- a/arch/arm/dts/k3-am64-mcu.dtsi
+++ b/arch/arm/dts/k3-am64-mcu.dtsi
@@ -10,22 +10,22 @@
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x04a00000 0x00 0x100>;
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 149 0>;
clock-names = "fclk";
+ status = "disabled";
};
mcu_uart1: serial@4a10000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x04a10000 0x00 0x100>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 160 0>;
clock-names = "fclk";
+ status = "disabled";
};
mcu_i2c0: i2c@4900000 {
@@ -37,6 +37,7 @@
power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 106 2>;
clock-names = "fck";
+ status = "disabled";
};
mcu_i2c1: i2c@4910000 {
@@ -48,6 +49,7 @@
power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 107 2>;
clock-names = "fck";
+ status = "disabled";
};
mcu_spi0: spi@4b00000 {
@@ -58,6 +60,7 @@
#size-cells = <0>;
power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 147 0>;
+ status = "disabled";
};
mcu_spi1: spi@4b10000 {
@@ -68,6 +71,7 @@
#size-cells = <0>;
power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 148 0>;
+ status = "disabled";
};
mcu_gpio_intr: interrupt-controller@4210000 {
diff --git a/arch/arm/dts/k3-am64.dtsi b/arch/arm/dts/k3-am64.dtsi
index 053e7f4..c858725 100644
--- a/arch/arm/dts/k3-am64.dtsi
+++ b/arch/arm/dts/k3-am64.dtsi
@@ -30,6 +30,8 @@
serial8 = &main_uart6;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
+ mmc0 = &sdhci0;
+ mmc1 = &sdhci1;
};
chosen { };
@@ -80,6 +82,7 @@
<0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0_CFG */
<0x00 0x3cd00000 0x00 0x3cd00000 0x00 0x00000200>, /* TIMERMGR0_CONFIG */
<0x00 0x3f004000 0x00 0x3f004000 0x00 0x00000400>, /* GICSS0_REGS */
+ <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA2_UL0 */
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>, /* CTRL_MMR0 */
<0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */
<0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>, /* DMASS */
@@ -88,6 +91,7 @@
<0x00 0x68000000 0x00 0x68000000 0x00 0x08000000>, /* PCIe DAT0 */
<0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* OC SRAM */
<0x00 0x78000000 0x00 0x78000000 0x00 0x00800000>, /* Main R5FSS */
+ <0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */
<0x06 0x00000000 0x06 0x00000000 0x01 0x00000000>, /* PCIe DAT1 */
<0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS0 DAT3 */
diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
index 055215c..9b6c7e8 100644
--- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
@@ -44,6 +44,7 @@
};
&main_i2c0 {
+ status = "okay";
u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
@@ -112,6 +113,9 @@
<0x0 0x43000200 0x0 0x8>;
reg-names = "cpsw_nuss", "mac_efuse";
/delete-property/ ranges;
+ pinctrl-0 = <&mdio1_pins_default /* HACK: as MDIO driver is not DM enabled */
+ &rgmii1_pins_default
+ &rgmii2_pins_default>;
cpsw-phy-sel@04044 {
compatible = "ti,am64-phy-gmii-sel";
diff --git a/arch/arm/dts/k3-am642-evm.dts b/arch/arm/dts/k3-am642-evm.dts
index 0307122..39feea7 100644
--- a/arch/arm/dts/k3-am642-evm.dts
+++ b/arch/arm/dts/k3-am642-evm.dts
@@ -13,7 +13,7 @@
#include "k3-am642.dtsi"
/ {
- compatible = "ti,am642-evm", "ti,am642";
+ compatible = "ti,am642-evm", "ti,am642";
model = "Texas Instruments AM642 EVM";
chosen {
@@ -184,6 +184,20 @@
};
};
};
+
+ transceiver1: can-phy0 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ standby-gpios = <&exp1 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ transceiver2: can-phy1 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ standby-gpios = <&exp1 9 GPIO_ACTIVE_HIGH>;
+ };
};
&main_pmx0 {
@@ -288,9 +302,30 @@
AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
>;
};
+
+ main_ecap0_pins_default: main-ecap0-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
+ >;
+ };
+
+ main_mcan0_pins_default: main-mcan0-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */
+ AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */
+ >;
+ };
+
+ main_mcan1_pins_default: main-mcan1-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */
+ AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
+ >;
+ };
};
&main_uart0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};
@@ -300,35 +335,8 @@
status = "reserved";
};
-&main_uart2 {
- status = "disabled";
-};
-
-&main_uart3 {
- status = "disabled";
-};
-
-&main_uart4 {
- status = "disabled";
-};
-
-&main_uart5 {
- status = "disabled";
-};
-
-&main_uart6 {
- status = "disabled";
-};
-
-&mcu_uart0 {
- status = "disabled";
-};
-
-&mcu_uart1 {
- status = "disabled";
-};
-
&main_i2c1 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
@@ -371,23 +379,8 @@
status = "reserved";
};
-&mcu_i2c0 {
- status = "disabled";
-};
-
-&mcu_i2c1 {
- status = "disabled";
-};
-
-&mcu_spi0 {
- status = "disabled";
-};
-
-&mcu_spi1 {
- status = "disabled";
-};
-
&main_spi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_spi0_pins_default>;
ti,pindir-d0-out-d1-in;
@@ -432,8 +425,7 @@
&cpsw3g {
pinctrl-names = "default";
- pinctrl-0 = <&mdio1_pins_default
- &rgmii1_pins_default
+ pinctrl-0 = <&rgmii1_pins_default
&rgmii2_pins_default>;
};
@@ -448,6 +440,10 @@
};
&cpsw3g_mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio1_pins_default>;
+
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
@@ -464,7 +460,7 @@
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
- flash@0{
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;
@@ -475,8 +471,6 @@
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <4>;
- #address-cells = <1>;
- #size-cells = <1>;
};
};
@@ -562,6 +556,7 @@
};
&pcie0_rc {
+ status = "okay";
reset-gpios = <&exp1 5 GPIO_ACTIVE_HIGH>;
phys = <&serdes0_pcie_link>;
phy-names = "pcie-phy";
@@ -572,5 +567,25 @@
phys = <&serdes0_pcie_link>;
phy-names = "pcie-phy";
num-lanes = <1>;
- status = "disabled";
+};
+
+&ecap0 {
+ status = "okay";
+ /* PWM is available on Pin 1 of header J12 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_ecap0_pins_default>;
+};
+
+&main_mcan0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mcan0_pins_default>;
+ phys = <&transceiver1>;
+};
+
+&main_mcan1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mcan1_pins_default>;
+ phys = <&transceiver2>;
};
diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts
index 92a6bfd..7493362 100644
--- a/arch/arm/dts/k3-am642-r5-evm.dts
+++ b/arch/arm/dts/k3-am642-r5-evm.dts
@@ -167,6 +167,47 @@
AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
>;
};
+
+ mdio1_pins_default: mdio1-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
+ AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
+ >;
+ };
+
+ rgmii1_pins_default: rgmii1-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
+ AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
+ AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */
+ AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
+ AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */
+ AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */
+ AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
+ AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
+ AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
+ AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
+ AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
+ AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
+ >;
+ };
+
+ rgmii2_pins_default: rgmii2-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
+ AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
+ AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
+ AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
+ AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
+ AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
+ AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
+ AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
+ AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
+ AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
+ AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
+ AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
+ >;
+ };
};
&dmsc {
diff --git a/arch/arm/dts/k3-am642-sk.dts b/arch/arm/dts/k3-am642-sk.dts
index d3aa290..2e2d40d 100644
--- a/arch/arm/dts/k3-am642-sk.dts
+++ b/arch/arm/dts/k3-am642-sk.dts
@@ -9,10 +9,11 @@
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
+#include <dt-bindings/leds/common.h>
#include "k3-am642.dtsi"
/ {
- compatible = "ti,am642-sk", "ti,am642";
+ compatible = "ti,am642-sk", "ti,am642";
model = "Texas Instruments AM642 SK";
chosen {
@@ -125,6 +126,99 @@
vin-supply = <&vcc_3v3_sys>;
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
};
+
+ com8_ls_en: regulator-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "com8_ls_en";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ pinctrl-0 = <&main_com8_ls_en_pins_default>;
+ pinctrl-names = "default";
+ gpio = <&main_gpio0 62 GPIO_ACTIVE_LOW>;
+ };
+
+ wlan_en: regulator-2 {
+ /* output of SN74AVC4T245RSVR */
+ compatible = "regulator-fixed";
+ regulator-name = "wlan_en";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ enable-active-high;
+ pinctrl-0 = <&main_wlan_en_pins_default>;
+ pinctrl-names = "default";
+ vin-supply = <&com8_ls_en>;
+ gpio = <&main_gpio0 48 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-controller {
+ compatible = "gpio-leds";
+
+ led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <1>;
+ gpios = <&exp2 0 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led-1 {
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <2>;
+ gpios = <&exp2 1 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led-2 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <3>;
+ gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led-3 {
+ color = <LED_COLOR_ID_AMBER>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <4>;
+ gpios = <&exp2 3 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led-4 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <5>;
+ gpios = <&exp2 4 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led-5 {
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <6>;
+ gpios = <&exp2 5 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led-6 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <7>;
+ gpios = <&exp2 6 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led-7 {
+ color = <LED_COLOR_ID_AMBER>;
+ function = LED_FUNCTION_HEARTBEAT;
+ function-enumerator = <8>;
+ linux,default-trigger = "heartbeat";
+ gpios = <&exp2 7 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
&main_pmx0 {
@@ -141,6 +235,15 @@
>;
};
+ main_uart0_pins_default: main-uart0-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
+ AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
+ AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
+ AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
+ >;
+ };
+
main_usb0_pins_default: main-usb0-pins-default {
pinctrl-single,pins = <
AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
@@ -210,14 +313,35 @@
AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
>;
};
-};
-&mcu_uart0 {
- status = "disabled";
+ main_ecap0_pins_default: main-ecap0-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
+ >;
+ };
+ main_wlan_en_pins_default: main-wlan-en-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */
+ >;
+ };
+
+ main_com8_ls_en_pins_default: main-com8-ls-en-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x00fc, PIN_OUTPUT, 7) /* (U7) PRG1_PRU0_GPO17.GPIO0_62 */
+ >;
+ };
+
+ main_wlan_pins_default: main-wlan-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */
+ >;
+ };
};
-&mcu_uart1 {
- status = "disabled";
+&main_uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart0_pins_default>;
};
&main_uart1 {
@@ -225,35 +349,8 @@
status = "reserved";
};
-&main_uart2 {
- status = "disabled";
-};
-
-&main_uart3 {
- status = "disabled";
-};
-
-&main_uart4 {
- status = "disabled";
-};
-
-&main_uart5 {
- status = "disabled";
-};
-
-&main_uart6 {
- status = "disabled";
-};
-
-&mcu_i2c0 {
- status = "disabled";
-};
-
-&mcu_i2c1 {
- status = "disabled";
-};
-
&main_i2c1 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
@@ -268,18 +365,14 @@
"VPP_LDO_EN", "RPI_PS_3V3_En",
"RPI_PS_5V0_En", "RPI_HAT_DETECT";
};
-};
-
-&main_i2c3 {
- status = "disabled";
-};
-
-&mcu_spi0 {
- status = "disabled";
-};
-&mcu_spi1 {
- status = "disabled";
+ exp2: gpio@60 {
+ compatible = "ti,tpic2810";
+ reg = <0x60>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "LED1","LED2","LED3","LED4","LED5","LED6","LED7","LED8";
+ };
};
/* mcu_gpio0 is reserved for mcu firmware usage */
@@ -287,6 +380,26 @@
status = "reserved";
};
+&sdhci0 {
+ vmmc-supply = <&wlan_en>;
+ bus-width = <4>;
+ non-removable;
+ cap-power-off-card;
+ keep-power-in-suspend;
+ ti,driver-strength-ohm = <50>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ wlcore: wlcore@2 {
+ compatible = "ti,wl1837";
+ reg = <2>;
+ pinctrl-0 = <&main_wlan_pins_default>;
+ pinctrl-names = "default";
+ interrupt-parent = <&main_gpio0>;
+ interrupts = <46 IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
&sdhci1 {
/* SD/MMC */
vmmc-supply = <&vdd_mmc1>;
@@ -326,8 +439,7 @@
&cpsw3g {
pinctrl-names = "default";
- pinctrl-0 = <&mdio1_pins_default
- &rgmii1_pins_default
+ pinctrl-0 = <&rgmii1_pins_default
&rgmii2_pins_default>;
};
@@ -342,6 +454,10 @@
};
&cpsw3g_mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio1_pins_default>;
+
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
@@ -363,7 +479,7 @@
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
- flash@0{
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;
@@ -374,8 +490,6 @@
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <4>;
- #address-cells = <1>;
- #size-cells = <1>;
};
};
@@ -446,10 +560,9 @@
<&main_r5fss1_core1_memory_region>;
};
-&pcie0_rc {
- status = "disabled";
-};
-
-&pcie0_ep {
- status = "disabled";
+&ecap0 {
+ status = "okay";
+ /* PWM is available on Pin 1 of header J3 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_ecap0_pins_default>;
};
diff --git a/arch/arm/dts/k3-am642.dtsi b/arch/arm/dts/k3-am642.dtsi
index e2b397c..8a76f48 100644
--- a/arch/arm/dts/k3-am642.dtsi
+++ b/arch/arm/dts/k3-am642.dtsi
@@ -60,6 +60,6 @@
cache-level = <2>;
cache-size = <0x40000>;
cache-line-size = <64>;
- cache-sets = <512>;
+ cache-sets = <256>;
};
};
diff --git a/arch/powerpc/dts/socrates-u-boot.dtsi b/arch/powerpc/dts/socrates-u-boot.dtsi
index 14a7c24..88df031 100644
--- a/arch/powerpc/dts/socrates-u-boot.dtsi
+++ b/arch/powerpc/dts/socrates-u-boot.dtsi
@@ -3,18 +3,11 @@
* Copyright (C) 2019
* Heiko Schocher, DENX Software Engineering, hs@denx.de
*/
+#include <config.h>
+
/ {
- binman {
- filename = "u-boot-socrates.bin";
- pad-byte = <0xff>;
- // Place dtb one sector before u-boot-nodtb.bin
- blob {
- filename = "dts/dt.dtb";
- };
- u-boot-nodtb {
- filename = "u-boot-nodtb.bin";
- offset = <0x20000>;
- };
+ aliases {
+ eeprom0 = &i2c_eeprom0;
};
chosen {
@@ -24,6 +17,12 @@
soc8544@e0000000 {
i2c@3000 {
u-boot,dm-pre-reloc;
+
+ i2c_eeprom0: eeprom@51{
+ compatible = "atmel,24c64";
+ reg = <0x51>;
+ pagesize = <32>;
+ };
};
};
};
@@ -38,3 +37,5 @@
u-boot,dm-pre-reloc;
clock-frequency = <333333330>;
};
+
+#include "u-boot.dtsi"
diff --git a/arch/powerpc/dts/socrates.dts b/arch/powerpc/dts/socrates.dts
index 452cf58..ea75eb6 100644
--- a/arch/powerpc/dts/socrates.dts
+++ b/arch/powerpc/dts/socrates.dts
@@ -9,6 +9,8 @@
/dts-v1/;
+/include/ "e500v2_power_isa.dtsi"
+
/ {
model = "abb,socrates";
compatible = "abb,socrates";
@@ -142,26 +144,29 @@
phy-handle = <&phy0>;
tbi-handle = <&tbi0>;
phy-connection-type = "rgmii-id";
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
- mdio@520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x520 0x20>;
+ phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ interrupt-parent = <&mpic>;
+ interrupts = <0 1>;
+ reg = <0>;
+ };
- phy0: ethernet-phy@0 {
- interrupt-parent = <&mpic>;
- interrupts = <0 1>;
- reg = <0>;
- };
- phy1: ethernet-phy@1 {
- interrupt-parent = <&mpic>;
- interrupts = <0 1>;
- reg = <1>;
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- };
+ phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ interrupt-parent = <&mpic>;
+ interrupts = <0 1>;
+ reg = <1>;
+ };
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
};
};
@@ -180,16 +185,16 @@
phy-handle = <&phy1>;
tbi-handle = <&tbi1>;
phy-connection-type = "rgmii-id";
+ };
- mdio@520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-tbi";
- reg = <0x520 0x20>;
+ mdio@26520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x26520 0x20>;
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- };
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
};
};
diff --git a/arch/powerpc/dts/u-boot.dtsi b/arch/powerpc/dts/u-boot.dtsi
index 6b7375c..c39ab6f 100644
--- a/arch/powerpc/dts/u-boot.dtsi
+++ b/arch/powerpc/dts/u-boot.dtsi
@@ -9,7 +9,7 @@
/ {
binman {
- filename = "u-boot.bin";
+ filename = "u-boot-dtb.bin";
skip-at-start = <CONFIG_TEXT_BASE>;
sort-by-offset;
pad-byte = <0xff>;
diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c
index 3df3e41..dae3764 100644
--- a/board/emulation/qemu-arm/qemu-arm.c
+++ b/board/emulation/qemu-arm/qemu-arm.c
@@ -15,6 +15,16 @@
#include <virtio.h>
#include <linux/kernel.h>
+#include <linux/sizes.h>
+
+/* GUIDs for capsule updatable firmware images */
+#define QEMU_ARM_UBOOT_IMAGE_GUID \
+ EFI_GUID(0xf885b085, 0x99f8, 0x45af, 0x84, 0x7d, \
+ 0xd5, 0x14, 0x10, 0x7a, 0x4a, 0x2c)
+
+#define QEMU_ARM64_UBOOT_IMAGE_GUID \
+ EFI_GUID(0x058b7d83, 0x50d5, 0x4c47, 0xa1, 0x95, \
+ 0x60, 0xd8, 0x6a, 0xd3, 0x41, 0xc4)
#ifdef CONFIG_ARM64
#include <asm/armv8/mmu.h>
diff --git a/board/emulation/qemu-arm/qemu-arm.env b/board/emulation/qemu-arm/qemu-arm.env
new file mode 100644
index 0000000..e658d5e
--- /dev/null
+++ b/board/emulation/qemu-arm/qemu-arm.env
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+/* environment for qemu-arm and qemu-arm64 */
+
+fdt_high=0xffffffff
+initrd_high=0xffffffff
+fdt_addr=0x40000000
+scriptaddr=0x40200000
+pxefile_addr_r=0x40300000
+kernel_addr_r=0x40400000
+ramdisk_addr_r=0x44000000
+boot_targets=qfw usb scsi virtio nvme dhcp
diff --git a/board/keymile/km83xx/Kconfig b/board/keymile/km83xx/Kconfig
index f87a2e6..9bdacee 100644
--- a/board/keymile/km83xx/Kconfig
+++ b/board/keymile/km83xx/Kconfig
@@ -69,7 +69,7 @@
default "keymile"
config SYS_CONFIG_NAME
- default "tuxx1"
+ default "km832x"
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
@@ -88,7 +88,7 @@
default "keymile"
config SYS_CONFIG_NAME
- default "kmsupx5"
+ default "km832x"
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
@@ -107,7 +107,7 @@
default "keymile"
config SYS_CONFIG_NAME
- default "tuge1"
+ default "km832x"
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
@@ -126,7 +126,7 @@
default "keymile"
config SYS_CONFIG_NAME
- default "kmopti2"
+ default "km832x"
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
@@ -145,7 +145,7 @@
default "keymile"
config SYS_CONFIG_NAME
- default "kmtepr2"
+ default "km832x"
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 9ec1dbc..8f2d873 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -35,6 +35,91 @@
DECLARE_GLOBAL_DATA_PTR;
+#if CONFIG_IS_ENABLED(TARGET_KMCOGE5NE) || CONFIG_IS_ENABLED(TARGET_KMETER1)
+#define CFG_SYS_DDR_MODE 0x47860452
+#define CFG_SYS_DDR_INTERVAL (\
+ (0x080 << SDRAM_INTERVAL_BSTOPRE_SHIFT) | \
+ (0x203 << SDRAM_INTERVAL_REFINT_SHIFT))
+#define CFG_SYS_DDR_TIMING_0 (\
+ (2 << TIMING_CFG0_MRS_CYC_SHIFT) | \
+ (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) | \
+ (6 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) | \
+ (2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) | \
+ (0 << TIMING_CFG0_WWT_SHIFT) | \
+ (0 << TIMING_CFG0_RRT_SHIFT) | \
+ (0 << TIMING_CFG0_WRT_SHIFT) | \
+ (0 << TIMING_CFG0_RWT_SHIFT))
+
+#define CFG_SYS_DDR_TIMING_1 ((TIMING_CFG1_CASLAT_50) | \
+ (2 << TIMING_CFG1_WRTORD_SHIFT) | \
+ (2 << TIMING_CFG1_ACTTOACT_SHIFT) | \
+ (3 << TIMING_CFG1_WRREC_SHIFT) | \
+ (7 << TIMING_CFG1_REFREC_SHIFT) | \
+ (3 << TIMING_CFG1_ACTTORW_SHIFT) | \
+ (8 << TIMING_CFG1_ACTTOPRE_SHIFT) | \
+ (3 << TIMING_CFG1_PRETOACT_SHIFT))
+
+#define CFG_SYS_DDR_TIMING_2 (\
+ (0xa << TIMING_CFG2_FOUR_ACT_SHIFT) | \
+ (3 << TIMING_CFG2_CKE_PLS_SHIFT) | \
+ (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) | \
+ (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) | \
+ (4 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) | \
+ (5 << TIMING_CFG2_CPO_SHIFT) | \
+ (0 << TIMING_CFG2_ADD_LAT_SHIFT))
+
+#define CFG_SYS_DDR_TIMING_3 0x00000000
+
+#else
+#define CFG_SYS_DDR_MODE 0x47860242
+#define CFG_SYS_DDR_INTERVAL ((0x064 << SDRAM_INTERVAL_BSTOPRE_SHIFT) | \
+ (0x200 << SDRAM_INTERVAL_REFINT_SHIFT))
+
+#define CFG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \
+ (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) | \
+ (2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) | \
+ (2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) | \
+ (0 << TIMING_CFG0_WWT_SHIFT) | \
+ (0 << TIMING_CFG0_RRT_SHIFT) | \
+ (0 << TIMING_CFG0_WRT_SHIFT) | \
+ (0 << TIMING_CFG0_RWT_SHIFT))
+
+#define CFG_SYS_DDR_TIMING_1 ((TIMING_CFG1_CASLAT_40) | \
+ (2 << TIMING_CFG1_WRTORD_SHIFT) | \
+ (2 << TIMING_CFG1_ACTTOACT_SHIFT) | \
+ (3 << TIMING_CFG1_WRREC_SHIFT) | \
+ (7 << TIMING_CFG1_REFREC_SHIFT) | \
+ (3 << TIMING_CFG1_ACTTORW_SHIFT) | \
+ (7 << TIMING_CFG1_ACTTOPRE_SHIFT) | \
+ (3 << TIMING_CFG1_PRETOACT_SHIFT))
+
+#define CFG_SYS_DDR_TIMING_2 ((8 << TIMING_CFG2_FOUR_ACT_SHIFT) | \
+ (3 << TIMING_CFG2_CKE_PLS_SHIFT) | \
+ (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) | \
+ (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) | \
+ (3 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) | \
+ (0 << TIMING_CFG2_ADD_LAT_SHIFT) | \
+ (5 << TIMING_CFG2_CPO_SHIFT))
+
+#define CFG_SYS_DDR_TIMING_3 0x00000000
+
+#define CFG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \
+ CSCONFIG_ODT_WR_CFG | \
+ CSCONFIG_ROW_BIT_13 | \
+ CSCONFIG_COL_BIT_10)
+#endif
+
+#define CFG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SDRAM_TYPE_DDR2 | \
+ SDRAM_CFG_32_BE | \
+ SDRAM_CFG_SREN | \
+ SDRAM_CFG_HSE)
+#define CFG_SYS_DDR_CLK_CNTL (DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
+#define CFG_SYS_DDR_SDRAM_CFG2 0x00401000
+#define CFG_SYS_DDR_CS0_BNDS 0x0000007f
+#define CFG_SYS_DDR_MODE2 0x8080c000
+
+#define CFG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */
+
static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];
static int piggy_present(void)
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 9c4dd18..02e6afb 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -13,6 +13,7 @@
#include <common.h>
#include <clock_legacy.h>
#include <env.h>
+#include <env_internal.h>
#include <init.h>
#include <pci.h>
#include <uuid.h>
@@ -217,24 +218,23 @@
}
#endif /* CONFIG_OF_BOARD_SETUP */
-#if defined(CONFIG_OF_SEPARATE)
-void *board_fdt_blob_setup(int *err)
+int get_serial_clock(void)
{
- void *fw_dtb;
-
- *err = 0;
- fw_dtb = (void *)(CONFIG_TEXT_BASE - CONFIG_ENV_SECT_SIZE);
- if (fdt_magic(fw_dtb) != FDT_MAGIC) {
- printf("DTB is not passed via %x\n", (u32)fw_dtb);
- *err = -ENXIO;
- return NULL;
- }
-
- return fw_dtb;
+ return 333333330;
}
-#endif
-int get_serial_clock(void)
+enum env_location env_get_location(enum env_operation op, int prio)
{
- return 333333330;
+ if (op == ENVOP_SAVE || op == ENVOP_ERASE)
+ return ENVL_FLASH;
+
+ switch (prio) {
+ case 0:
+ return ENVL_NOWHERE;
+ case 1:
+ return ENVL_FLASH;
+ default:
+ return ENVL_UNKNOWN;
+ }
+ return ENVL_UNKNOWN;
}
diff --git a/board/ti/am62x/am62x.env b/board/ti/am62x/am62x.env
new file mode 100644
index 0000000..c9a3b3d
--- /dev/null
+++ b/board/ti/am62x/am62x.env
@@ -0,0 +1,108 @@
+loadaddr=0x82000000
+kernel_addr_r=0x82000000
+fdtaddr=0x88000000
+dtboaddr=0x89000000
+fdt_addr_r=0x88000000
+fdtoverlay_addr_r=0x89000000
+rdaddr=0x88080000
+ramdisk_addr_r=0x88080000
+scriptaddr=0x80000000
+pxefile_addr_r=0x80100000
+bootm_size=0x10000000
+boot_fdt=try
+
+mmcrootfstype=ext4 rootwait
+finduuid=part uuid ${boot} ${bootpart} uuid
+args_mmc=run finduuid;setenv bootargs console=${console}
+ ${optargs}
+ root=PARTUUID=${uuid} rw
+ rootfstype=${mmcrootfstype}
+loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr
+bootscript=echo Running bootscript from mmc${mmcdev} ...;
+ source ${loadaddr}
+bootenvfile=uEnv.txt
+importbootenv=echo Importing environment from mmc${mmcdev} ...;
+ env import -t ${loadaddr} ${filesize}
+loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}
+loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}
+loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}
+envboot=mmc dev ${mmcdev};
+ if mmc rescan; then
+ echo SD/MMC found on device ${mmcdev};
+ if run loadbootscript; then
+ run bootscript;
+ else
+ if run loadbootenv; then
+ echo Loaded env from ${bootenvfile};
+ run importbootenv;
+ fi;
+ if test -n $uenvcmd; then
+ echo Running uenvcmd ...;
+ run uenvcmd;
+ fi;
+ fi;
+ fi;
+mmcloados=
+ if test ${boot_fdt} = yes || test ${boot_fdt} = try; then
+ if run loadfdt; then
+ bootz ${loadaddr} - ${fdtaddr};
+ else
+ if test ${boot_fdt} = try; then
+ bootz;
+ else
+ echo WARN: Cannot load the DT;
+ fi;
+ fi;
+ else
+ bootz;
+ fi;
+mmcboot=mmc dev ${mmcdev};
+ devnum=${mmcdev};
+ devtype=mmc;
+ if mmc rescan; then
+ echo SD/MMC found on device ${mmcdev};
+ if run loadimage; then
+ run args_mmc;
+ if test ${boot_fit} -eq 1; then
+ run run_fit;
+ else
+ run mmcloados;
+ fi;
+ fi;
+ fi;
+
+default_device_tree=k3-am625-sk.dtb
+findfdt=
+ setenv name_fdt ${default_device_tree};
+ setenv fdtfile ${name_fdt}
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000
+ ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
+init_mmc=run args_all args_mmc
+get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}
+get_overlay_mmc=
+ fdt address ${fdtaddr};
+ fdt resize 0x100000;
+ for overlay in $name_overlays;
+ do;
+ load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
+ fdt apply ${dtboaddr};
+ done;
+get_kern_mmc=load mmc ${bootpart} ${loadaddr}
+ ${bootdir}/${name_kern}
+get_fit_mmc=load mmc ${bootpart} ${addr_fit}
+ ${bootdir}/${name_fit}
+partitions=name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
+
+splashfile=ti.gz
+splashimage=0x82000000
+splashpos=m,m
+splashsource=mmc
diff --git a/boot/Kconfig b/boot/Kconfig
index fdcfbae..5f49162 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -406,6 +406,33 @@
if BOOTSTD
+config BOOTSTD_DEFAULTS
+ bool "Select some common defaults for standard boot"
+ depends on BOOTSTD
+ imply USE_BOOTCOMMAND
+ # Bring in some defaults which are generally needed. Boards can drop
+ # these as needed to save code space. Bootstd does not generally require
+ # the commands themselves to be enabled, but this is how some of the
+ # functionality is controlled at present
+ imply CMD_EXT2
+ imply CMD_EXT4
+ imply CMD_FAT
+ imply CMD_FS_GENERIC
+ imply CMD_PART
+ imply CMD_DHCP if NET
+ imply CMD_MII if NET
+ imply CMD_PING if NET
+ imply CMD_PXE if NET
+ imply USB_STORAGE
+ imply SUPPORT_RAW_INITRD
+ imply ENV_VARS_UBOOT_CONFIG
+ imply EFI_PARTITION
+ imply ISO_PARTITION
+ help
+ These are not required but are commonly needed to support a good
+ selection of booting methods. Enable this to improve the capability
+ of U-Boot to boot various images.
+
config BOOTSTD_BOOTCOMMAND
bool "Use bootstd to boot"
default y if !DISTRO_DEFAULTS
@@ -561,6 +588,7 @@
config EXPO
bool "Support for expos - groups of scenes displaying a UI"
+ depends on VIDEO
default y if BOOTMETH_VBE
help
An expo is a way of presenting and collecting information from the
diff --git a/boot/Makefile b/boot/Makefile
index f990e66..0db4672 100644
--- a/boot/Makefile
+++ b/boot/Makefile
@@ -26,11 +26,12 @@
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_DISTRO) += bootmeth_distro.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_DISTRO_PXE) += bootmeth_pxe.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EFILOADER) += bootmeth_efi.o
+obj-$(CONFIG_$(SPL_TPL_)QFW) += bootmeth_qfw.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SANDBOX) += bootmeth_sandbox.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SCRIPT) += bootmeth_script.o
ifdef CONFIG_$(SPL_TPL_)BOOTSTD_FULL
obj-$(CONFIG_$(SPL_TPL_)CMD_BOOTEFI_BOOTMGR) += bootmeth_efi_mgr.o
-obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += bootflow_menu.o
+obj-$(CONFIG_$(SPL_TPL_)EXPO) += bootflow_menu.o
endif
obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
@@ -48,7 +49,7 @@
obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o
endif
-obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE) += expo.o scene.o scene_menu.o
+obj-$(CONFIG_$(SPL_TPL_)EXPO) += expo.o scene.o scene_menu.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE) += vbe.o vbe_request.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE_SIMPLE) += vbe_simple.o
diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c
index 99ee08e..8103a11 100644
--- a/boot/bootdev-uclass.c
+++ b/boot/bootdev-uclass.c
@@ -309,6 +309,9 @@
if (ret)
return log_msg_ret("find", ret);
}
+ ret = device_probe(blk);
+ if (ret)
+ return log_msg_ret("act", ret);
*blkp = blk;
return 0;
diff --git a/boot/bootflow.c b/boot/bootflow.c
index dc3f1f0..60791e6 100644
--- a/boot/bootflow.c
+++ b/boot/bootflow.c
@@ -270,6 +270,10 @@
if (ret) {
bootflow_iter_set_dev(iter, NULL, 0);
} else {
+ /*
+ * Probe the bootdev. This does not probe any attached
+ * block device, since they are siblings
+ */
ret = device_probe(dev);
log_debug("probe %s %d\n", dev->name, ret);
if (!log_msg_ret("probe", ret))
@@ -504,7 +508,7 @@
enum uclass_id id = device_get_uclass_id(media);
log_debug("uclass %d: %s\n", id, uclass_get_name(id));
- if (id != UCLASS_ETH && id != UCLASS_BOOTSTD)
+ if (id != UCLASS_ETH && id != UCLASS_BOOTSTD && id != UCLASS_QFW)
return 0;
return -ENOTSUPP;
diff --git a/boot/bootmeth_qfw.c b/boot/bootmeth_qfw.c
new file mode 100644
index 0000000..a5f95d4
--- /dev/null
+++ b/boot/bootmeth_qfw.c
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Bootmethod for QEMU qfw
+ *
+ * Copyright 2023 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#define LOG_CATEGORY UCLASS_BOOTSTD
+
+#include <common.h>
+#include <command.h>
+#include <bootdev.h>
+#include <bootflow.h>
+#include <bootmeth.h>
+#include <env.h>
+#include <qfw.h>
+#include <dm.h>
+
+static int qfw_check(struct udevice *dev, struct bootflow_iter *iter)
+{
+ const struct udevice *media = dev_get_parent(iter->dev);
+ enum uclass_id id = device_get_uclass_id(media);
+
+ log_debug("media=%s\n", media->name);
+ if (id == UCLASS_QFW)
+ return 0;
+
+ return -ENOTSUPP;
+}
+
+static int qfw_read_bootflow(struct udevice *dev, struct bootflow *bflow)
+{
+ struct udevice *qfw_dev = dev_get_parent(bflow->dev);
+ ulong load, initrd;
+ int ret;
+
+ load = env_get_hex("kernel_addr_r", 0);
+ initrd = env_get_hex("ramdisk_addr_r", 0);
+ log_debug("setup kernel %s %lx %lx\n", qfw_dev->name, load, initrd);
+ bflow->name = strdup("qfw");
+ if (!bflow->name)
+ return log_msg_ret("name", -ENOMEM);
+
+ ret = qemu_fwcfg_setup_kernel(qfw_dev, load, initrd);
+ log_debug("setup kernel result %d\n", ret);
+ if (ret)
+ return log_msg_ret("cmd", -EIO);
+
+ bflow->state = BOOTFLOWST_READY;
+
+ return 0;
+}
+
+static int qfw_read_file(struct udevice *dev, struct bootflow *bflow,
+ const char *file_path, ulong addr, ulong *sizep)
+{
+ return -ENOSYS;
+}
+
+static int qfw_boot(struct udevice *dev, struct bootflow *bflow)
+{
+ int ret;
+
+ ret = run_command("booti ${kernel_addr_r} ${ramdisk_addr_r}:${filesize} ${fdtcontroladdr}",
+ 0);
+ if (ret) {
+ ret = run_command("bootz ${kernel_addr_r} ${ramdisk_addr_r}:${filesize} "
+ "${fdtcontroladdr}", 0);
+ }
+
+ return ret ? -EIO : 0;
+}
+
+static int qfw_bootmeth_bind(struct udevice *dev)
+{
+ struct bootmeth_uc_plat *plat = dev_get_uclass_plat(dev);
+
+ plat->desc = "Sandbox boot for testing";
+
+ return 0;
+}
+
+static struct bootmeth_ops qfw_bootmeth_ops = {
+ .check = qfw_check,
+ .read_bootflow = qfw_read_bootflow,
+ .read_file = qfw_read_file,
+ .boot = qfw_boot,
+};
+
+static const struct udevice_id qfw_bootmeth_ids[] = {
+ { .compatible = "u-boot,qfw-syslinux" },
+ { }
+};
+
+U_BOOT_DRIVER(bootmeth_qfw) = {
+ .name = "bootmeth_qfw",
+ .id = UCLASS_BOOTMETH,
+ .of_match = qfw_bootmeth_ids,
+ .ops = &qfw_bootmeth_ops,
+ .bind = qfw_bootmeth_bind,
+};
diff --git a/cmd/Kconfig b/cmd/Kconfig
index dc0446e..b50e14f 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -337,6 +337,12 @@
help
Support booting RTEMS images via the bootm command.
+config CMD_SEAMA
+ bool "Support read SEAMA NAND images"
+ depends on MTD_RAW_NAND
+ help
+ Support reading NAND Seattle Image (SEAMA) images.
+
config CMD_VBE
bool "vbe - Verified Boot for Embedded"
depends on BOOTMETH_VBE
diff --git a/cmd/Makefile b/cmd/Makefile
index 7b6ff73..b03d68d 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -156,6 +156,7 @@
obj-$(CONFIG_CMD_SF) += sf.o
obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
+obj-$(CONFIG_CMD_SEAMA) += seama.o
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
obj-$(CONFIG_CMD_SETEXPR_FMT) += printf.o
obj-$(CONFIG_CMD_SPI) += spi.o
diff --git a/cmd/bootflow.c b/cmd/bootflow.c
index 692bc6d..3548bbb 100644
--- a/cmd/bootflow.c
+++ b/cmd/bootflow.c
@@ -394,15 +394,20 @@
if (ret)
return CMD_RET_FAILURE;
- ret = bootflow_menu_run(std, text_mode, &bflow);
- if (ret) {
- if (ret == -EAGAIN)
- printf("Nothing chosen\n");
- else
- printf("Menu failed (err=%d)\n", ret);
-
- return CMD_RET_FAILURE;
+ if (IS_ENABLED(CONFIG_EXPO)) {
+ ret = bootflow_menu_run(std, text_mode, &bflow);
+ if (ret) {
+ if (ret == -EAGAIN)
+ printf("Nothing chosen\n");
+ else
+ printf("Menu failed (err=%d)\n", ret);
+ }
+ } else {
+ printf("Menu not supported\n");
+ ret = -ENOSYS;
}
+ if (ret)
+ return CMD_RET_FAILURE;
printf("Selected: %s\n", bflow->os_name ? bflow->os_name : bflow->name);
std->cur_bootflow = bflow;
diff --git a/cmd/qfw.c b/cmd/qfw.c
index 0c49c60..ae3c6a7 100644
--- a/cmd/qfw.c
+++ b/cmd/qfw.c
@@ -12,73 +12,6 @@
static struct udevice *qfw_dev;
-/*
- * This function prepares kernel for zboot. It loads kernel data
- * to 'load_addr', initrd to 'initrd_addr' and kernel command
- * line using qemu fw_cfg interface.
- */
-static int qemu_fwcfg_cmd_setup_kernel(void *load_addr, void *initrd_addr)
-{
- char *data_addr;
- uint32_t setup_size, kernel_size, cmdline_size, initrd_size;
-
- qfw_read_entry(qfw_dev, FW_CFG_SETUP_SIZE, 4, &setup_size);
- qfw_read_entry(qfw_dev, FW_CFG_KERNEL_SIZE, 4, &kernel_size);
-
- if (kernel_size == 0) {
- printf("fatal: no kernel available\n");
- return CMD_RET_FAILURE;
- }
-
- data_addr = load_addr;
- if (setup_size != 0) {
- qfw_read_entry(qfw_dev, FW_CFG_SETUP_DATA,
- le32_to_cpu(setup_size), data_addr);
- data_addr += le32_to_cpu(setup_size);
- }
-
- qfw_read_entry(qfw_dev, FW_CFG_KERNEL_DATA,
- le32_to_cpu(kernel_size), data_addr);
- data_addr += le32_to_cpu(kernel_size);
- env_set_hex("filesize", le32_to_cpu(kernel_size));
-
- data_addr = initrd_addr;
- qfw_read_entry(qfw_dev, FW_CFG_INITRD_SIZE, 4, &initrd_size);
- if (initrd_size == 0) {
- printf("warning: no initrd available\n");
- } else {
- qfw_read_entry(qfw_dev, FW_CFG_INITRD_DATA,
- le32_to_cpu(initrd_size), data_addr);
- data_addr += le32_to_cpu(initrd_size);
- env_set_hex("filesize", le32_to_cpu(initrd_size));
- }
-
- qfw_read_entry(qfw_dev, FW_CFG_CMDLINE_SIZE, 4, &cmdline_size);
- if (cmdline_size) {
- qfw_read_entry(qfw_dev, FW_CFG_CMDLINE_DATA,
- le32_to_cpu(cmdline_size), data_addr);
- /*
- * if kernel cmdline only contains '\0', (e.g. no -append
- * when invoking qemu), do not update bootargs
- */
- if (*data_addr != '\0') {
- if (env_set("bootargs", data_addr) < 0)
- printf("warning: unable to change bootargs\n");
- }
- }
-
- printf("loading kernel to address %p size %x", load_addr,
- le32_to_cpu(kernel_size));
- if (initrd_size)
- printf(" initrd %p size %x\n",
- initrd_addr,
- le32_to_cpu(initrd_size));
- else
- printf("\n");
-
- return 0;
-}
-
static int qemu_fwcfg_cmd_list_firmware(void)
{
int ret;
@@ -119,28 +52,28 @@
int argc, char *const argv[])
{
char *env;
- void *load_addr;
- void *initrd_addr;
+ ulong load_addr;
+ ulong initrd_addr;
env = env_get("loadaddr");
load_addr = env ?
- (void *)hextoul(env, NULL) :
- (void *)CONFIG_SYS_LOAD_ADDR;
+ hextoul(env, NULL) :
+ CONFIG_SYS_LOAD_ADDR;
env = env_get("ramdiskaddr");
initrd_addr = env ?
- (void *)hextoul(env, NULL) :
+ hextoul(env, NULL) :
#ifdef CFG_RAMDISK_ADDR
- (void *)CFG_RAMDISK_ADDR;
+ CFG_RAMDISK_ADDR;
#else
- NULL;
+ 0;
#endif
if (argc == 2) {
- load_addr = (void *)hextoul(argv[0], NULL);
- initrd_addr = (void *)hextoul(argv[1], NULL);
+ load_addr = hextoul(argv[0], NULL);
+ initrd_addr = hextoul(argv[1], NULL);
} else if (argc == 1) {
- load_addr = (void *)hextoul(argv[0], NULL);
+ load_addr = hextoul(argv[0], NULL);
}
if (!load_addr || !initrd_addr) {
@@ -148,7 +81,7 @@
return CMD_RET_FAILURE;
}
- return qemu_fwcfg_cmd_setup_kernel(load_addr, initrd_addr);
+ return qemu_fwcfg_setup_kernel(qfw_dev, load_addr, initrd_addr);
}
static struct cmd_tbl fwcfg_commands[] = {
diff --git a/cmd/seama.c b/cmd/seama.c
new file mode 100644
index 0000000..3aafb43
--- /dev/null
+++ b/cmd/seama.c
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 Linus Walleij <linus.walleij@linaro.org>
+ * Support for the "SEAttle iMAge" SEAMA NAND image format
+ */
+
+#include <common.h>
+#include <command.h>
+#include <nand.h>
+
+/*
+ * All SEAMA data is stored in the flash in "network endianness"
+ * i.e. big endian, which means that it needs to be byte-swapped
+ * on all little endian platforms.
+ *
+ * structure for a SEAMA entity in NAND flash:
+ *
+ * 32 bit SEAMA magic 0x5EA3A417
+ * 16 bit reserved
+ * 16 bit metadata size (following the header)
+ * 32 bit image size
+ * 16 bytes MD5 digest of the image
+ * meta data
+ * ... image data ...
+ *
+ * Then if a new SEAMA magic follows, that is the next image.
+ */
+
+#define SEAMA_MAGIC 0x5EA3A417
+#define SEAMA_HDR_NO_META_SZ 28
+#define SEAMA_MAX_META_SZ (1024 - SEAMA_HDR_NO_META_SZ)
+
+struct seama_header {
+ u32 magic;
+ u32 meta_size;
+ u32 image_size;
+ u8 md5[16];
+ u8 metadata[SEAMA_MAX_META_SZ];
+};
+
+static struct seama_header shdr;
+
+static int env_set_val(const char *varname, ulong val)
+{
+ int ret;
+
+ ret = env_set_hex(varname, val);
+ if (ret)
+ printf("Failed to %s env var\n", varname);
+
+ return ret;
+}
+
+static int do_seama_load_image(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct mtd_info *mtd;
+ uintptr_t load_addr;
+ unsigned long image_index;
+ u32 len;
+ size_t readsz;
+ int ret;
+ u32 *start;
+ u32 *offset;
+ u32 *end;
+ u32 tmp;
+
+ if (argc < 2 || argc > 3)
+ return CMD_RET_USAGE;
+
+ load_addr = hextoul(argv[1], NULL);
+ if (!load_addr) {
+ printf("Invalid load address\n");
+ return CMD_RET_USAGE;
+ }
+
+ /* Can be 0 for first image */
+ image_index = hextoul(argv[2], NULL);
+
+ /* We only support one NAND, the first one */
+ nand_curr_device = 0;
+ mtd = get_nand_dev_by_index(0);
+ if (!mtd) {
+ printf("NAND Device 0 not available\n");
+ return CMD_RET_FAILURE;
+ }
+
+#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
+ board_nand_select_device(mtd_to_nand(mtd), 0);
+#endif
+
+ printf("Loading SEAMA image %lu from %s\n", image_index, mtd->name);
+
+ readsz = sizeof(shdr);
+ offset = 0;
+ ret = nand_read_skip_bad(mtd, 0, &readsz, NULL, mtd->size,
+ (u_char *)&shdr);
+ if (ret) {
+ printf("Read error reading SEAMA header\n");
+ return CMD_RET_FAILURE;
+ }
+
+ if (shdr.magic != SEAMA_MAGIC) {
+ printf("Invalid SEAMA image magic: 0x%08x\n", shdr.magic);
+ return CMD_RET_FAILURE;
+ }
+
+ /* Only the lower 16 bits are valid */
+ shdr.meta_size &= 0xFFFF;
+
+ if (env_set_val("seama_image_size", 0))
+ return CMD_RET_FAILURE;
+
+ printf("SEMA IMAGE:\n");
+ printf(" metadata size %d\n", shdr.meta_size);
+ printf(" image size %d\n", shdr.image_size);
+ printf(" checksum %02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
+ shdr.md5[0], shdr.md5[1], shdr.md5[2], shdr.md5[3],
+ shdr.md5[4], shdr.md5[5], shdr.md5[6], shdr.md5[7],
+ shdr.md5[8], shdr.md5[9], shdr.md5[10], shdr.md5[11],
+ shdr.md5[12], shdr.md5[13], shdr.md5[14], shdr.md5[15]);
+
+ /* TODO: handle metadata if needed */
+
+ len = shdr.image_size;
+ if (env_set_val("seama_image_size", len))
+ return CMD_RET_FAILURE;
+
+ /* We need to include the header (read full pages) */
+ readsz = shdr.image_size + SEAMA_HDR_NO_META_SZ + shdr.meta_size;
+ ret = nand_read_skip_bad(mtd, 0, &readsz, NULL, mtd->size,
+ (u_char *)load_addr);
+ if (ret) {
+ printf("Read error reading SEAMA main image\n");
+ return CMD_RET_FAILURE;
+ }
+
+ /* We use a temporary variable tmp to avoid to hairy casts */
+ start = (u32 *)load_addr;
+ tmp = (u32)start;
+ tmp += SEAMA_HDR_NO_META_SZ + shdr.meta_size;
+ offset = (u32 *)tmp;
+ tmp += shdr.image_size;
+ end = (u32 *)tmp;
+
+ printf("Decoding SEAMA image 0x%08x..0x%08x to 0x%08x\n",
+ (u32)offset, (u32)end, (u32)start);
+ for (; start < end; start++, offset++)
+ *start = be32_to_cpu(*offset);
+
+ return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD
+ (seama, 3, 1, do_seama_load_image,
+ "Load the SEAMA image and sets envs",
+ "seama <addr> <imageindex>\n"
+);
diff --git a/common/log.c b/common/log.c
index 57b71ed..7cfc49b 100644
--- a/common/log.c
+++ b/common/log.c
@@ -30,6 +30,7 @@
"acpi",
"boot",
"event",
+ "fs",
};
_Static_assert(ARRAY_SIZE(log_cat_name) == LOGC_COUNT - LOGC_NONE,
diff --git a/common/qfw.c b/common/qfw.c
index 90cbb8c..45e87d3 100644
--- a/common/qfw.c
+++ b/common/qfw.c
@@ -5,9 +5,11 @@
*/
#include <dm.h>
-#include <dm/uclass.h>
+#include <env.h>
+#include <mapmem.h>
#include <qfw.h>
#include <stdlib.h>
+#include <dm/uclass.h>
int qfw_get_dev(struct udevice **devp)
{
@@ -102,3 +104,65 @@
{
return iter->entry == iter->end;
}
+
+int qemu_fwcfg_setup_kernel(struct udevice *qfw_dev, ulong load_addr,
+ ulong initrd_addr)
+{
+ char *data_addr;
+ u32 setup_size, kernel_size, cmdline_size, initrd_size;
+
+ qfw_read_entry(qfw_dev, FW_CFG_SETUP_SIZE, 4, &setup_size);
+ qfw_read_entry(qfw_dev, FW_CFG_KERNEL_SIZE, 4, &kernel_size);
+
+ if (!kernel_size) {
+ printf("fatal: no kernel available\n");
+ return -ENOENT;
+ }
+
+ data_addr = map_sysmem(load_addr, 0);
+ if (setup_size) {
+ qfw_read_entry(qfw_dev, FW_CFG_SETUP_DATA,
+ le32_to_cpu(setup_size), data_addr);
+ data_addr += le32_to_cpu(setup_size);
+ }
+
+ qfw_read_entry(qfw_dev, FW_CFG_KERNEL_DATA,
+ le32_to_cpu(kernel_size), data_addr);
+ data_addr += le32_to_cpu(kernel_size);
+ env_set_hex("filesize", le32_to_cpu(kernel_size));
+
+ data_addr = map_sysmem(initrd_addr, 0);
+ qfw_read_entry(qfw_dev, FW_CFG_INITRD_SIZE, 4, &initrd_size);
+ if (!initrd_size) {
+ printf("warning: no initrd available\n");
+ } else {
+ qfw_read_entry(qfw_dev, FW_CFG_INITRD_DATA,
+ le32_to_cpu(initrd_size), data_addr);
+ data_addr += le32_to_cpu(initrd_size);
+ env_set_hex("filesize", le32_to_cpu(initrd_size));
+ }
+
+ qfw_read_entry(qfw_dev, FW_CFG_CMDLINE_SIZE, 4, &cmdline_size);
+ if (cmdline_size) {
+ qfw_read_entry(qfw_dev, FW_CFG_CMDLINE_DATA,
+ le32_to_cpu(cmdline_size), data_addr);
+ /*
+ * if kernel cmdline only contains '\0', (e.g. no -append
+ * when invoking qemu), do not update bootargs
+ */
+ if (*data_addr) {
+ if (env_set("bootargs", data_addr) < 0)
+ printf("warning: unable to change bootargs\n");
+ }
+ }
+
+ printf("loading kernel to address %lx size %x", load_addr,
+ le32_to_cpu(kernel_size));
+ if (initrd_size)
+ printf(" initrd %lx size %x\n", initrd_addr,
+ le32_to_cpu(initrd_size));
+ else
+ printf("\n");
+
+ return 0;
+}
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 9ae3e5e..c51482b 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -591,7 +591,6 @@
debug("Ignoring compatible = %s property\n",
compatible);
}
- return 0;
ret = fpga_load(devnum, (void *)fpga_image->load_addr,
fpga_image->size, BIT_FULL, flags);
diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig
index 124fb8d..0215c5f 100644
--- a/configs/a3y17lte_defconfig
+++ b/configs/a3y17lte_defconfig
@@ -24,4 +24,3 @@
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_DM_I2C_GPIO=y
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig
index ffb0b3f..d1cd97b 100644
--- a/configs/a5y17lte_defconfig
+++ b/configs/a5y17lte_defconfig
@@ -24,4 +24,3 @@
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_DM_I2C_GPIO=y
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig
index 8c1229d..bef2d09 100644
--- a/configs/a7y17lte_defconfig
+++ b/configs/a7y17lte_defconfig
@@ -24,4 +24,3 @@
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_DM_I2C_GPIO=y
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 78e63c9..06fccc5 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -2,6 +2,8 @@
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
CONFIG_AM33XX=y
CONFIG_CLOCK_SYNTHESIZER=y
@@ -10,11 +12,8 @@
CONFIG_AM335X_USB1=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_SPL_LOAD_FIT=y
-# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_bootcmd"
CONFIG_LOGLEVEL=3
@@ -43,6 +42,7 @@
CONFIG_SPL_USB_ETHER=y
CONFIG_SYS_MAXARGS=64
CONFIG_SYS_BOOTM_LEN=0x1000000
+CONFIG_CMD_EXTENSION=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00080000
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/dragonboard845c_defconfig b/configs/dragonboard845c_defconfig
index a69d827..cef82f5 100644
--- a/configs/dragonboard845c_defconfig
+++ b/configs/dragonboard845c_defconfig
@@ -26,4 +26,3 @@
CONFIG_PMIC_QCOM=y
CONFIG_MSM_GENI_SERIAL=y
CONFIG_SPMI_MSM=y
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7981_emmc_rfb_defconfig b/configs/mt7981_emmc_rfb_defconfig
index b3b37b6..4832a22 100644
--- a/configs/mt7981_emmc_rfb_defconfig
+++ b/configs/mt7981_emmc_rfb_defconfig
@@ -62,4 +62,3 @@
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7981_rfb_defconfig b/configs/mt7981_rfb_defconfig
index b7ffb4df..c397527 100644
--- a/configs/mt7981_rfb_defconfig
+++ b/configs/mt7981_rfb_defconfig
@@ -64,4 +64,3 @@
CONFIG_DM_SPI=y
CONFIG_MTK_SPIM=y
CONFIG_HEXDUMP=y
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7981_sd_rfb_defconfig b/configs/mt7981_sd_rfb_defconfig
index 85be9bb..17592dc 100644
--- a/configs/mt7981_sd_rfb_defconfig
+++ b/configs/mt7981_sd_rfb_defconfig
@@ -62,4 +62,3 @@
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7986_rfb_defconfig b/configs/mt7986_rfb_defconfig
index ac91c93..1363f9d 100644
--- a/configs/mt7986_rfb_defconfig
+++ b/configs/mt7986_rfb_defconfig
@@ -64,4 +64,3 @@
CONFIG_DM_SPI=y
CONFIG_MTK_SPIM=y
CONFIG_HEXDUMP=y
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7986a_bpir3_emmc_defconfig b/configs/mt7986a_bpir3_emmc_defconfig
index 2d4876f..354159d 100644
--- a/configs/mt7986a_bpir3_emmc_defconfig
+++ b/configs/mt7986a_bpir3_emmc_defconfig
@@ -62,4 +62,3 @@
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/mt7986a_bpir3_sd_defconfig b/configs/mt7986a_bpir3_sd_defconfig
index 08edfe7..db7ef98 100644
--- a/configs/mt7986a_bpir3_sd_defconfig
+++ b/configs/mt7986a_bpir3_sd_defconfig
@@ -62,4 +62,3 @@
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/qcs404evb_defconfig b/configs/qcs404evb_defconfig
index dae1551..d3608ca 100644
--- a/configs/qcs404evb_defconfig
+++ b/configs/qcs404evb_defconfig
@@ -51,4 +51,3 @@
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_STORAGE=y
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig
index 2f46030..f66ad32 100644
--- a/configs/qemu_arm64_defconfig
+++ b/configs/qemu_arm64_defconfig
@@ -13,13 +13,14 @@
CONFIG_ENV_ADDR=0x4000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
@@ -27,6 +28,7 @@
CONFIG_PCI_INIT_R=y
CONFIG_SYS_CBSIZE=512
CONFIG_SYS_PBSIZE=532
+CONFIG_CMD_BOOTZ=y
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_DFU=y
@@ -70,3 +72,4 @@
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_PCI=y
CONFIG_TPM=y
+CONFIG_HUSH_PARSER=y
diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig
index f0ee546..c2e25c1 100644
--- a/configs/qemu_arm_defconfig
+++ b/configs/qemu_arm_defconfig
@@ -14,13 +14,14 @@
CONFIG_ENV_ADDR=0x4000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
@@ -28,6 +29,7 @@
CONFIG_PCI_INIT_R=y
CONFIG_SYS_CBSIZE=512
CONFIG_SYS_PBSIZE=532
+CONFIG_CMD_BOOTZ=y
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
@@ -72,3 +74,4 @@
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_PCI=y
CONFIG_TPM=y
+CONFIG_HUSH_PARSER=y
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 46be662..e03c971 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -1,23 +1,35 @@
CONFIG_PPC=y
CONFIG_SYS_IMMR=0xE0000000
-CONFIG_TEXT_BASE=0xfff80000
+CONFIG_TEXT_BASE=0xFFF40000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="socrates"
-CONFIG_ENV_ADDR=0xFFF40000
+CONFIG_SYS_CLK_FREQ=66666666
+CONFIG_ENV_ADDR=0xFFF20000
# CONFIG_SYS_PCI_64BIT is not set
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_SOCRATES=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
-CONFIG_SYS_MONITOR_LEN=393216
+CONFIG_SYS_MONITOR_LEN=786432
CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_MONITOR_BASE=0xFFF80000
+CONFIG_SYS_MONITOR_BASE=0xFFF40000
CONFIG_BOOTDELAY=1
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Enter password to abort autoboot in %d seconds!\n"
+CONFIG_AUTOBOOT_ENCRYPTION=y
+CONFIG_AUTOBOOT_STOP_STR_ENABLE=y
+CONFIG_AUTOBOOT_STOP_STR_SHA256="2dd411308b37266d33c9246821adc5aa4002f0091f5e2aece1953789930ad924"
+CONFIG_BOOT_RETRY=y
+CONFIG_BOOT_RETRY_TIME=120
+CONFIG_RESET_TO_RETRY=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run boot_nor"
CONFIG_USE_PREBOOT=y
@@ -34,6 +46,8 @@
# CONFIG_BOOTM_VXWORKS is not set
CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_IMLS=y
+CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_DM=y
CONFIG_CMD_I2C=y
CONFIG_LOADS_ECHO=y
@@ -51,21 +65,25 @@
CONFIG_CMD_SNTP=y
# CONFIG_CMD_HASH is not set
CONFIG_CMD_EXT2=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=fe000000.nor_flash,nand0=socrates_nand"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=fe000000.nor_flash:13312k(system1),13312k(system2),5120k(data),128k(env),128k(env-red),768k(u-boot);socrates_nand:256M(ubi-data1),-(ubi-data2)"
# CONFIG_CMD_IRQ is not set
CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_NOWHERE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_ENV_ADDR_REDUND=0xFFF20000
+CONFIG_ENV_ADDR_REDUND=0xFFF00000
+CONFIG_ENV_APPEND=y
+CONFIG_ENV_WRITEABLE_LIST=y
+CONFIG_ENV_ACCESS_IGNORE_FORCE=y
CONFIG_USE_ETHPRIME=y
-CONFIG_ETHPRIME="TSEC0"
+CONFIG_ETHPRIME="eTSEC0"
CONFIG_SPD_EEPROM=y
CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xFE001001
CONFIG_SYS_OR0_PRELIM=0xFE000030
-CONFIG_SYS_BR1_PRELIM_BOOL=y
-CONFIG_SYS_BR1_PRELIM=0xFC001001
-CONFIG_SYS_OR1_PRELIM=0xFE000030
CONFIG_SYS_BR2_PRELIM_BOOL=y
CONFIG_SYS_BR2_PRELIM=0xC80018A1
CONFIG_SYS_OR2_PRELIM=0xFC000000
@@ -74,25 +92,25 @@
CONFIG_SYS_OR3_PRELIM=0xFFF00000
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_FSL=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
# CONFIG_MMC is not set
CONFIG_MTD=y
+CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
+CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SYS_FLASH_QUIET_TEST=y
CONFIG_SYS_MAX_FLASH_SECT=256
-CONFIG_SYS_MAX_FLASH_BANKS=2
CONFIG_MTD_RAW_NAND=y
-CONFIG_PHY_ATHEROS=y
-CONFIG_PHY_BROADCOM=y
-CONFIG_PHY_DAVICOM=y
CONFIG_PHY_LXT=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_NATSEMI=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_SMSC=y
-CONFIG_PHY_VITESSE=y
+CONFIG_DM_MDIO=y
+CONFIG_PHY_GIGE=y
+CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
CONFIG_PCI_MPC85XX=y
diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig
index 7a64f2a..81fd7b2 100644
--- a/configs/starqltechn_defconfig
+++ b/configs/starqltechn_defconfig
@@ -33,4 +33,3 @@
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_VIDEO_SIMPLE=y
CONFIG_VIDEO_DT_SIMPLEFB=y
-CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig
index 23e1f0e..88a94dd 100644
--- a/configs/tools-only_defconfig
+++ b/configs/tools-only_defconfig
@@ -12,6 +12,7 @@
# CONFIG_BOOTMETH_VBE is not set
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
+# CONFIG_AVB_VERIFY is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_ELF is not set
diff --git a/doc/develop/bootstd.rst b/doc/develop/bootstd.rst
index 281aabf..dabe987 100644
--- a/doc/develop/bootstd.rst
+++ b/doc/develop/bootstd.rst
@@ -396,6 +396,10 @@
includes the full set of commands, more error messages when things go wrong and
bootmeth ordering with the bootmeths environment variable.
+You should probably also enable `CONFIG_BOOTSTD_DEFAULTS`, which provides
+several filesystem and network features (if `CONFIG_NET` is enabled) so that
+a good selection of boot options is available.
+
Available bootmeth drivers
--------------------------
diff --git a/doc/usage/cmd/seama.rst b/doc/usage/cmd/seama.rst
new file mode 100644
index 0000000..356c00a
--- /dev/null
+++ b/doc/usage/cmd/seama.rst
@@ -0,0 +1,60 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+seama command
+=============
+
+Synopsis
+--------
+
+::
+
+ seama <dst_addr> <index>
+
+Description
+-----------
+
+The seama command is used to load and decode SEAttle iMAges from NAND
+flash to memory.
+
+This type of flash image is found in some D-Link routers such as
+DIR-645, DIR-842, DIR-859, DIR-860L, DIR-885L, DIR890L and DCH-M225,
+as well as in WD and NEC routers on the ath79 (MIPS), Broadcom
+BCM53xx, and RAMIPS platforms.
+
+This U-Boot command will read and decode a SEAMA image from raw NAND
+flash on any platform. As it is always using big endian format for
+the data decoding is always necessary on platforms such as ARM.
+
+dst_addr
+ destination address of the byte stream to be loaded
+
+index
+ the image index (0, 1, 2..) can be omitted
+
+Example
+-------
+
+::
+
+ => seama 0x01000000
+ Loading SEAMA image 0 from nand0
+ SEMA IMAGE:
+ metadata size 36
+ image size 8781764
+ checksum 054859cfb1487b59befda98824e09dd6
+ Decoding SEAMA image 0x01000040..0x01860004 to 0x01000000
+
+
+Configuration
+-------------
+
+The command is available if CONFIG_CMD_SEAMA=y.
+
+Return value
+------------
+
+The return value $? is set 0 (true) if the loading is succefull, and
+is set to 1 (false) in case of error.
+
+The environment variable $seama_image_size is set to the size of the
+loaded SEAMA image.
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 3804046..13e6939 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -75,6 +75,7 @@
cmd/sbi
cmd/sf
cmd/scp03
+ cmd/seama
cmd/setexpr
cmd/size
cmd/sleep
diff --git a/drivers/misc/qfw.c b/drivers/misc/qfw.c
index 1d54b75..9ef95ca 100644
--- a/drivers/misc/qfw.c
+++ b/drivers/misc/qfw.c
@@ -7,6 +7,9 @@
#define LOG_CATEGORY UCLASS_QFW
#include <common.h>
+#include <bootdev.h>
+#include <bootflow.h>
+#include <bootmeth.h>
#include <command.h>
#include <errno.h>
#include <log.h>
@@ -310,8 +313,92 @@
return 0;
}
+static int qfw_post_bind(struct udevice *dev)
+{
+ int ret;
+
+ ret = bootdev_setup_for_dev(dev, "qfw_bootdev");
+ if (ret)
+ return log_msg_ret("dev", ret);
+
+ return 0;
+}
+
+static int qfw_get_bootflow(struct udevice *dev, struct bootflow_iter *iter,
+ struct bootflow *bflow)
+{
+ const struct udevice *media = dev_get_parent(dev);
+ int ret;
+
+ if (!CONFIG_IS_ENABLED(BOOTSTD))
+ return -ENOSYS;
+
+ log_debug("media=%s\n", media->name);
+ ret = bootmeth_check(bflow->method, iter);
+ if (ret)
+ return log_msg_ret("check", ret);
+
+ log_debug("iter->part=%d\n", iter->part);
+
+ /* We only support the whole device, not partitions */
+ if (iter->part)
+ return log_msg_ret("max", -ESHUTDOWN);
+
+ log_debug("reading bootflow with method: %s\n", bflow->method->name);
+ ret = bootmeth_read_bootflow(bflow->method, bflow);
+ if (ret)
+ return log_msg_ret("method", ret);
+
+ return 0;
+}
+
+static int qfw_bootdev_bind(struct udevice *dev)
+{
+ struct bootdev_uc_plat *ucp = dev_get_uclass_plat(dev);
+
+ ucp->prio = BOOTDEVP_4_SCAN_FAST;
+
+ return 0;
+}
+
+static int qfw_bootdev_hunt(struct bootdev_hunter *info, bool show)
+{
+ int ret;
+
+ ret = uclass_probe_all(UCLASS_QFW);
+ if (ret && ret != -ENOENT)
+ return log_msg_ret("vir", ret);
+
+ return 0;
+}
+
UCLASS_DRIVER(qfw) = {
.id = UCLASS_QFW,
.name = "qfw",
+ .post_bind = qfw_post_bind,
.per_device_auto = sizeof(struct qfw_dev),
};
+
+struct bootdev_ops qfw_bootdev_ops = {
+ .get_bootflow = qfw_get_bootflow,
+};
+
+static const struct udevice_id qfw_bootdev_ids[] = {
+ { .compatible = "u-boot,bootdev-qfw" },
+ { }
+};
+
+U_BOOT_DRIVER(qfw_bootdev) = {
+ .name = "qfw_bootdev",
+ .id = UCLASS_BOOTDEV,
+ .ops = &qfw_bootdev_ops,
+ .bind = qfw_bootdev_bind,
+ .of_match = qfw_bootdev_ids,
+};
+
+BOOTDEV_HUNTER(qfw_bootdev_hunter) = {
+ .prio = BOOTDEVP_4_SCAN_FAST,
+ .uclass = UCLASS_QFW,
+ .hunt = qfw_bootdev_hunt,
+ .drv = DM_DRIVER_REF(qfw_bootdev),
+};
diff --git a/drivers/virtio/virtio-uclass.c b/drivers/virtio/virtio-uclass.c
index 91af412..de9bc90 100644
--- a/drivers/virtio/virtio-uclass.c
+++ b/drivers/virtio/virtio-uclass.c
@@ -247,8 +247,8 @@
}
device_set_name_alloced(vdev);
- if (uc_priv->device == VIRTIO_ID_BLOCK) {
- ret = bootdev_setup_for_dev(udev, name);
+ if (uc_priv->device == VIRTIO_ID_BLOCK && !IS_ENABLED(CONFIG_SANDBOX)) {
+ ret = bootdev_setup_sibling_blk(vdev, "virtio_bootdev");
if (ret)
return log_msg_ret("bootdev", ret);
}
@@ -275,6 +275,10 @@
int i;
int ret;
+ /* bootdevs are not virtio devices */
+ if (device_get_uclass_id(vdev) == UCLASS_BOOTDEV)
+ return 0;
+
/*
* Save the real virtio device (eg: virtio-net, virtio-blk) to
* the transport (parent) device's uclass priv for future use.
diff --git a/drivers/virtio/virtio_blk.c b/drivers/virtio/virtio_blk.c
index 30cfc56..9581058 100644
--- a/drivers/virtio/virtio_blk.c
+++ b/drivers/virtio/virtio_blk.c
@@ -4,6 +4,8 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
+#define LOG_CATEGORY UCLASS_VIRTIO
+
#include <common.h>
#include <blk.h>
#include <dm.h>
@@ -42,6 +44,8 @@
sgs[num_out + num_in++] = &data_sg;
sgs[num_out + num_in++] = &status_sg;
+ log_debug("dev=%s, active=%d, priv=%p, priv->vq=%p\n", dev->name,
+ device_active(dev), priv, priv->vq);
ret = virtqueue_add(priv->vq, sgs, num_out, num_in);
if (ret)
@@ -49,8 +53,10 @@
virtqueue_kick(priv->vq);
+ log_debug("wait...");
while (!virtqueue_get_buf(priv->vq, NULL))
;
+ log_debug("done\n");
return status == VIRTIO_BLK_S_OK ? blkcnt : -EIO;
}
@@ -58,6 +64,7 @@
static ulong virtio_blk_read(struct udevice *dev, lbaint_t start,
lbaint_t blkcnt, void *buffer)
{
+ log_debug("read %s\n", dev->name);
return virtio_blk_do_req(dev, start, blkcnt, buffer,
VIRTIO_BLK_T_IN);
}
diff --git a/env/mmc.c b/env/mmc.c
index 8576141..5b01f65 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -273,11 +273,11 @@
if (ret)
goto fini;
}
+ }
- if (mmc_get_env_addr(mmc, copy, &offset)) {
- ret = 1;
- goto fini;
- }
+ if (mmc_get_env_addr(mmc, copy, &offset)) {
+ ret = 1;
+ goto fini;
}
printf("Writing to %sMMC(%d)... ", copy ? "redundant " : "", dev);
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index 8ff2f6d..00541eb 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -5,6 +5,8 @@
* R/W (V)FAT 12/16/32 filesystem implementation by Donggeun Kim
*/
+#define LOG_CATEGORY LOGC_FS
+
#include <common.h>
#include <command.h>
#include <config.h>
diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h
index 7fbefde..7bf0780 100644
--- a/include/configs/am62x_evm.h
+++ b/include/configs/am62x_evm.h
@@ -38,51 +38,8 @@
DISTRO_BOOT_DEV_PXE(func) \
DISTRO_BOOT_DEV_DHCP(func)
-#define PARTS_DEFAULT \
- /* Linux partitions */ \
- "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
-
-/* U-Boot general configuration */
-#define EXTRA_ENV_AM625_BOARD_SETTINGS \
- "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
- "findfdt=" \
- "setenv name_fdt ${default_device_tree};" \
- "setenv fdtfile ${name_fdt}\0" \
- "name_kern=Image\0" \
- "console=ttyS2,115200n8\0" \
- "args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 " \
- "${mtdparts}\0" \
- "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
-
-/* U-Boot MMC-specific configuration */
-#define EXTRA_ENV_AM625_BOARD_SETTINGS_MMC \
- "boot=mmc\0" \
- "mmcdev=1\0" \
- "bootpart=1:2\0" \
- "bootdir=/boot\0" \
- "rd_spec=-\0" \
- "init_mmc=run args_all args_mmc\0" \
- "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
- "get_overlay_mmc=" \
- "fdt address ${fdtaddr};" \
- "fdt resize 0x100000;" \
- "for overlay in $name_overlays;" \
- "do;" \
- "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \
- "fdt apply ${dtboaddr};" \
- "done;\0" \
- "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
- "${bootdir}/${name_kern}\0" \
- "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
- "${bootdir}/${name_fit}\0" \
- "partitions=" PARTS_DEFAULT
-
/* Incorporate settings into the U-Boot environment */
#define CFG_EXTRA_ENV_SETTINGS \
- DEFAULT_LINUX_BOOT_ENV \
- DEFAULT_MMC_TI_ARGS \
- EXTRA_ENV_AM625_BOARD_SETTINGS \
- EXTRA_ENV_AM625_BOARD_SETTINGS_MMC \
BOOTENV
/* Now for the remaining common defines */
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index a7210b5..48b1cea 100644
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -161,7 +161,14 @@
# define BOOT_TARGET_DHCP(func)
#endif
+#ifdef CONFIG_CMD_USB
+# define BOOT_TARGET_USB(func) func(USB, usb, 0)
+#else
+# define BOOT_TARGET_USB(func)
+#endif
+
#define BOOT_TARGET_DEVICES(func) \
+ BOOT_TARGET_USB(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
BOOT_TARGET_PXE(func) \
diff --git a/include/configs/km/km-mpc832x.h b/include/configs/km/km-mpc832x.h
deleted file mode 100644
index f64c0ee..0000000
--- a/include/configs/km/km-mpc832x.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * System IO Config
- */
-#define CFG_SYS_SICRL SICRL_IRQ_CKS
-
-#define CFG_SYS_DDRCDR (\
- DDRCDR_EN | \
- DDRCDR_PZ_MAXZ | \
- DDRCDR_NZ_MAXZ | \
- DDRCDR_M_ODR)
-
-#define CFG_SYS_DDR_CS0_BNDS 0x0000007f
-#define CFG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SDRAM_TYPE_DDR2 | \
- SDRAM_CFG_32_BE | \
- SDRAM_CFG_SREN | \
- SDRAM_CFG_HSE)
-
-#define CFG_SYS_DDR_SDRAM_CFG2 0x00401000
-#define CFG_SYS_DDR_CLK_CNTL (DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
-#define CFG_SYS_DDR_INTERVAL ((0x064 << SDRAM_INTERVAL_BSTOPRE_SHIFT) | \
- (0x200 << SDRAM_INTERVAL_REFINT_SHIFT))
-
-#define CFG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \
- CSCONFIG_ODT_WR_CFG | \
- CSCONFIG_ROW_BIT_13 | \
- CSCONFIG_COL_BIT_10)
-
-#define CFG_SYS_DDR_MODE 0x47860242
-#define CFG_SYS_DDR_MODE2 0x8080c000
-
-#define CFG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \
- (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) | \
- (2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) | \
- (2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) | \
- (0 << TIMING_CFG0_WWT_SHIFT) | \
- (0 << TIMING_CFG0_RRT_SHIFT) | \
- (0 << TIMING_CFG0_WRT_SHIFT) | \
- (0 << TIMING_CFG0_RWT_SHIFT))
-
-#define CFG_SYS_DDR_TIMING_1 ((TIMING_CFG1_CASLAT_40) | \
- (2 << TIMING_CFG1_WRTORD_SHIFT) | \
- (2 << TIMING_CFG1_ACTTOACT_SHIFT) | \
- (3 << TIMING_CFG1_WRREC_SHIFT) | \
- (7 << TIMING_CFG1_REFREC_SHIFT) | \
- (3 << TIMING_CFG1_ACTTORW_SHIFT) | \
- (7 << TIMING_CFG1_ACTTOPRE_SHIFT) | \
- (3 << TIMING_CFG1_PRETOACT_SHIFT))
-
-#define CFG_SYS_DDR_TIMING_2 ((8 << TIMING_CFG2_FOUR_ACT_SHIFT) | \
- (3 << TIMING_CFG2_CKE_PLS_SHIFT) | \
- (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) | \
- (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) | \
- (3 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) | \
- (0 << TIMING_CFG2_ADD_LAT_SHIFT) | \
- (5 << TIMING_CFG2_CPO_SHIFT))
-
-#define CFG_SYS_DDR_TIMING_3 0x00000000
-
-#define CFG_SYS_KMBEC_FPGA_BASE 0xE8000000
-#define CFG_SYS_KMBEC_FPGA_SIZE 128
diff --git a/include/configs/km/km-mpc8360.h b/include/configs/km/km-mpc8360.h
deleted file mode 100644
index 04d3d35..0000000
--- a/include/configs/km/km-mpc8360.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* KMBEC FPGA (PRIO) */
-#define CFG_SYS_KMBEC_FPGA_BASE 0xE8000000
-#define CFG_SYS_KMBEC_FPGA_SIZE 64
-
-/*
- * High Level Configuration Options
- */
-
-/*
- * System IO Setup
- */
-#define CFG_SYS_SICRH (SICRH_UC1EOBI | SICRH_UC2E1OBI)
-
-/**
- * DDR RAM settings
- */
-#define CFG_SYS_DDR_SDRAM_CFG (\
- SDRAM_CFG_SDRAM_TYPE_DDR2 | \
- SDRAM_CFG_SREN | \
- SDRAM_CFG_HSE)
-
-#define CFG_SYS_DDR_SDRAM_CFG2 0x00401000
-
-#define CFG_SYS_DDR_CLK_CNTL (\
- DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
-
-#define CFG_SYS_DDR_INTERVAL (\
- (0x080 << SDRAM_INTERVAL_BSTOPRE_SHIFT) | \
- (0x203 << SDRAM_INTERVAL_REFINT_SHIFT))
-
-#define CFG_SYS_DDR_CS0_BNDS 0x0000007f
-
-#define CFG_SYS_DDRCDR (\
- DDRCDR_EN | \
- DDRCDR_Q_DRN)
-#define CFG_SYS_DDR_MODE 0x47860452
-#define CFG_SYS_DDR_MODE2 0x8080c000
-
-#define CFG_SYS_DDR_TIMING_0 (\
- (2 << TIMING_CFG0_MRS_CYC_SHIFT) | \
- (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) | \
- (6 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) | \
- (2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) | \
- (0 << TIMING_CFG0_WWT_SHIFT) | \
- (0 << TIMING_CFG0_RRT_SHIFT) | \
- (0 << TIMING_CFG0_WRT_SHIFT) | \
- (0 << TIMING_CFG0_RWT_SHIFT))
-
-#define CFG_SYS_DDR_TIMING_1 ((TIMING_CFG1_CASLAT_50) | \
- (2 << TIMING_CFG1_WRTORD_SHIFT) | \
- (2 << TIMING_CFG1_ACTTOACT_SHIFT) | \
- (3 << TIMING_CFG1_WRREC_SHIFT) | \
- (7 << TIMING_CFG1_REFREC_SHIFT) | \
- (3 << TIMING_CFG1_ACTTORW_SHIFT) | \
- (8 << TIMING_CFG1_ACTTOPRE_SHIFT) | \
- (3 << TIMING_CFG1_PRETOACT_SHIFT))
-
-#define CFG_SYS_DDR_TIMING_2 (\
- (0xa << TIMING_CFG2_FOUR_ACT_SHIFT) | \
- (3 << TIMING_CFG2_CKE_PLS_SHIFT) | \
- (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) | \
- (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) | \
- (4 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) | \
- (5 << TIMING_CFG2_CPO_SHIFT) | \
- (0 << TIMING_CFG2_ADD_LAT_SHIFT))
-
-#define CFG_SYS_DDR_TIMING_3 0x00000000
-
diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h
index c939caf..21f707a 100644
--- a/include/configs/km/km-mpc83xx.h
+++ b/include/configs/km/km-mpc83xx.h
@@ -1,10 +1,4 @@
/*
- * Internal Definitions
- */
-#include <linux/stringify.h>
-#define BOOTFLASH_START 0xF0000000
-
-/*
* DDR Setup
*/
#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
@@ -12,14 +6,7 @@
#define CFG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
-#define CFG_83XX_DDR_USES_CS0
-
/*
- * Manually set up DDR parameters
- */
-#define CFG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */
-
-/*
* The reserved memory
*/
#define CFG_SYS_FLASH_BASE 0xF0000000
@@ -48,10 +35,34 @@
#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE }
+#define CFG_SYS_KMBEC_FPGA_BASE 0xE8000000
+
#if defined(CONFIG_CMD_NAND)
#define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE
#endif
+#if defined(CONFIG_TARGET_KMCOGE5NE) || defined(CONFIG_TARGET_KMETER1)
+/*
+ * System IO Setup
+ */
+#define CFG_SYS_SICRH (SICRH_UC1EOBI | SICRH_UC2E1OBI)
+
+#define CFG_SYS_DDRCDR (\
+ DDRCDR_EN | \
+ DDRCDR_Q_DRN)
+#else
+/*
+ * System IO Config
+ */
+#define CFG_SYS_SICRL SICRL_IRQ_CKS
+
+#define CFG_SYS_DDRCDR (\
+ DDRCDR_EN | \
+ DDRCDR_PZ_MAXZ | \
+ DDRCDR_NZ_MAXZ | \
+ DDRCDR_M_ODR)
+#endif
+
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
diff --git a/include/configs/kmopti2.h b/include/configs/km832x.h
similarity index 96%
rename from include/configs/kmopti2.h
rename to include/configs/km832x.h
index d6a3844..69c28c2 100644
--- a/include/configs/kmopti2.h
+++ b/include/configs/km832x.h
@@ -22,6 +22,5 @@
/* include common defines/options for all Keymile boards */
#include "km/km-mpc83xx.h"
-#include "km/km-mpc832x.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h
index d52f45b..7835332 100644
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -13,7 +13,6 @@
/* include common defines/options for all Keymile boards */
#include "km/km-mpc83xx.h"
-#include "km/km-mpc8360.h"
/**
* KMCOGE5NE has 512 MB RAM
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index 6f67e5a..f9be06f 100644
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -10,7 +10,6 @@
/* include common defines/options for all Keymile boards */
#include "km/km-mpc83xx.h"
-#include "km/km-mpc8360.h"
#define CFG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \
CSCONFIG_ROW_BIT_13 | \
diff --git a/include/configs/kmsupx5.h b/include/configs/kmsupx5.h
deleted file mode 100644
index d6a3844..0000000
--- a/include/configs/kmsupx5.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
- * Dave Liu <daveliu@freescale.com>
- *
- * Copyright (C) 2007 Logic Product Development, Inc.
- * Peter Barada <peterb@logicpd.com>
- *
- * Copyright (C) 2007 MontaVista Software, Inc.
- * Anton Vorontsov <avorontsov@ru.mvista.com>
- *
- * (C) Copyright 2008
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * (C) Copyright 2010-2013
- * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
- * Holger Brunck, Keymile GmbH, holger.bruncl@keymile.com
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* include common defines/options for all Keymile boards */
-#include "km/km-mpc83xx.h"
-#include "km/km-mpc832x.h"
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/kmtepr2.h b/include/configs/kmtepr2.h
deleted file mode 100644
index d6a3844..0000000
--- a/include/configs/kmtepr2.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
- * Dave Liu <daveliu@freescale.com>
- *
- * Copyright (C) 2007 Logic Product Development, Inc.
- * Peter Barada <peterb@logicpd.com>
- *
- * Copyright (C) 2007 MontaVista Software, Inc.
- * Anton Vorontsov <avorontsov@ru.mvista.com>
- *
- * (C) Copyright 2008
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * (C) Copyright 2010-2013
- * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
- * Holger Brunck, Keymile GmbH, holger.bruncl@keymile.com
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* include common defines/options for all Keymile boards */
-#include "km/km-mpc83xx.h"
-#include "km/km-mpc832x.h"
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h
index 45bd94e..e296f39 100644
--- a/include/configs/qemu-arm.h
+++ b/include/configs/qemu-arm.h
@@ -6,84 +6,9 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <linux/sizes.h>
-
/* Physical memory map */
-
#define CFG_SYS_SDRAM_BASE 0x40000000
-/* GUIDs for capsule updatable firmware images */
-#define QEMU_ARM_UBOOT_IMAGE_GUID \
- EFI_GUID(0xf885b085, 0x99f8, 0x45af, 0x84, 0x7d, \
- 0xd5, 0x14, 0x10, 0x7a, 0x4a, 0x2c)
-
-#define QEMU_ARM64_UBOOT_IMAGE_GUID \
- EFI_GUID(0x058b7d83, 0x50d5, 0x4c47, 0xa1, 0x95, \
- 0x60, 0xd8, 0x6a, 0xd3, 0x41, 0xc4)
-
-/* Try files from QEMU's -kernel/-initrd, through the QEMU firmware device. */
-#define BOOTENV_DEV_QFW(devtypeu, devtypel, instance) \
- "bootcmd_qfw= " \
- "if qfw load $kernel_addr_r $ramdisk_addr_r; then " \
- " booti $kernel_addr_r $ramdisk_addr_r:$filesize $fdtcontroladdr; " \
- " if test $? -eq 1; then " \
- " bootz $kernel_addr_r $ramdisk_addr_r:$filesize $fdtcontroladdr; " \
- " fi ; " \
- "fi\0"
-#define BOOTENV_DEV_NAME_QFW(devtypeu, devtypel, instance) "qfw "
-
/* For timer, QEMU emulates an ARMv7/ARMv8 architected timer */
-/* Environment options */
-
-#if CONFIG_IS_ENABLED(CMD_USB)
-# define BOOT_TARGET_USB(func) func(USB, usb, 0)
-#else
-# define BOOT_TARGET_USB(func)
-#endif
-
-#if CONFIG_IS_ENABLED(CMD_SCSI)
-# define BOOT_TARGET_SCSI(func) func(SCSI, scsi, 0)
-#else
-# define BOOT_TARGET_SCSI(func)
-#endif
-
-#if CONFIG_IS_ENABLED(CMD_VIRTIO)
-# define BOOT_TARGET_VIRTIO(func) func(VIRTIO, virtio, 0)
-#else
-# define BOOT_TARGET_VIRTIO(func)
-#endif
-
-#if CONFIG_IS_ENABLED(CMD_NVME)
-# define BOOT_TARGET_NVME(func) func(NVME, nvme, 0)
-#else
-# define BOOT_TARGET_NVME(func)
-#endif
-
-#if CONFIG_IS_ENABLED(CMD_DHCP)
-# define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
-#else
-# define BOOT_TARGET_DHCP(func)
-#endif
-
-#define BOOT_TARGET_DEVICES(func) \
- func(QFW, qfw, na) \
- BOOT_TARGET_USB(func) \
- BOOT_TARGET_SCSI(func) \
- BOOT_TARGET_VIRTIO(func) \
- BOOT_TARGET_NVME(func) \
- BOOT_TARGET_DHCP(func)
-
-#include <config_distro_bootcmd.h>
-
-#define CFG_EXTRA_ENV_SETTINGS \
- "fdt_high=0xffffffff\0" \
- "initrd_high=0xffffffff\0" \
- "fdt_addr=0x40000000\0" \
- "scriptaddr=0x40200000\0" \
- "pxefile_addr_r=0x40300000\0" \
- "kernel_addr_r=0x40400000\0" \
- "ramdisk_addr_r=0x44000000\0" \
- BOOTENV
-
#endif /* __CONFIG_H */
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 2b35be8..305914d 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -66,10 +66,9 @@
* Flash on the LocalBus
*/
#define CFG_SYS_FLASH0 0xFE000000
-#define CFG_SYS_FLASH1 0xFC000000
-#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH1, CFG_SYS_FLASH0 }
+#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH0 }
-#define CFG_SYS_LBC_FLASH_BASE CFG_SYS_FLASH1 /* Localbus flash start */
+#define CFG_SYS_LBC_FLASH_BASE CFG_SYS_FLASH0 /* Localbus flash start */
#define CFG_SYS_FLASH_BASE CFG_SYS_LBC_FLASH_BASE /* start of FLASH */
#define CFG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */
@@ -110,15 +109,20 @@
*/
#define CFG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+#define SOCRATES_ENV_MTD \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
+ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"
#define CFG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consdev=ttyS0\0" \
+ "initrd_high=0x03000000\0" \
"uboot_file=/home/tftp/syscon3/u-boot.bin\0" \
"bootfile=/home/tftp/syscon3/uImage\0" \
"fdt_file=/home/tftp/syscon3/socrates.dtb\0" \
"initrd_file=/home/tftp/syscon3/uinitrd.gz\0" \
- "uboot_addr=FFF60000\0" \
+ "uboot_addr=FFF40000\0" \
"kernel_addr=FE000000\0" \
"fdt_addr=FE1E0000\0" \
"ramdisk_addr=FE200000\0" \
@@ -134,16 +138,16 @@
"addip=setenv bootargs $bootargs " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask" \
":$hostname:$netdev:off panic=1\0" \
- "boot_nor=run ramargs addcons;" \
+ "boot_nor=run ramargs addcons addmtd;" \
"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
"tftp ${fdt_addr_r} ${fdt_file}; " \
- "run nfsargs addip addcons;" \
+ "run nfsargs addip addcons addmtd;" \
"bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
"update_uboot=tftp 100000 ${uboot_file};" \
- "protect off fff60000 ffffffff;" \
- "era fff60000 ffffffff;" \
- "cp.b 100000 fff60000 ${filesize};" \
+ "protect off ${uboot_addr} ffffffff;" \
+ "era ${uboot_addr} ffffffff;" \
+ "cp.b 100000 ${uboot_addr} ${filesize};" \
"setenv filesize;saveenv\0" \
"update_kernel=tftp 100000 ${bootfile};" \
"era fe000000 fe1dffff;" \
@@ -164,8 +168,11 @@
"boot_usb=run load_usb usbargs addcons;" \
"bootm ${kernel_addr_r} - ${fdt_addr};" \
"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
+ SOCRATES_ENV_MTD \
""
+#define CFG_ENV_FLAGS_LIST_STATIC "ethaddr:mw,eth1addr:mw,system1_addr:xw,serial#:sw,ethact:sw,ethprime:sw"
+
/* pass open firmware flat tree */
#endif /* __CONFIG_H */
diff --git a/include/configs/tuge1.h b/include/configs/tuge1.h
deleted file mode 100644
index d6a3844..0000000
--- a/include/configs/tuge1.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
- * Dave Liu <daveliu@freescale.com>
- *
- * Copyright (C) 2007 Logic Product Development, Inc.
- * Peter Barada <peterb@logicpd.com>
- *
- * Copyright (C) 2007 MontaVista Software, Inc.
- * Anton Vorontsov <avorontsov@ru.mvista.com>
- *
- * (C) Copyright 2008
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * (C) Copyright 2010-2013
- * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
- * Holger Brunck, Keymile GmbH, holger.bruncl@keymile.com
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* include common defines/options for all Keymile boards */
-#include "km/km-mpc83xx.h"
-#include "km/km-mpc832x.h"
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/tuxx1.h b/include/configs/tuxx1.h
deleted file mode 100644
index d6a3844..0000000
--- a/include/configs/tuxx1.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
- * Dave Liu <daveliu@freescale.com>
- *
- * Copyright (C) 2007 Logic Product Development, Inc.
- * Peter Barada <peterb@logicpd.com>
- *
- * Copyright (C) 2007 MontaVista Software, Inc.
- * Anton Vorontsov <avorontsov@ru.mvista.com>
- *
- * (C) Copyright 2008
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * (C) Copyright 2010-2013
- * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
- * Holger Brunck, Keymile GmbH, holger.bruncl@keymile.com
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* include common defines/options for all Keymile boards */
-#include "km/km-mpc83xx.h"
-#include "km/km-mpc832x.h"
-
-#endif /* __CONFIG_H */
diff --git a/include/elf.h b/include/elf.h
index aeda159..a4ba74d 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -360,6 +360,15 @@
Elf32_Half st_shndx; /* section header index */
} Elf32_Sym;
+typedef struct {
+ Elf64_Word st_name; /* name - index into string table */
+ unsigned char st_info; /* type and binding */
+ unsigned char st_other; /* 0 - no defined meaning */
+ Elf64_Half st_shndx; /* section header index */
+ Elf64_Addr st_value; /* symbol value */
+ Elf64_Xword st_size; /* symbol size */
+} Elf64_Sym;
+
/* Symbol table index */
#define STN_UNDEF 0 /* undefined */
diff --git a/include/environment/pg-wcom/powerpc.env b/include/environment/pg-wcom/powerpc.env
index a57fd93..744c073 100644
--- a/include/environment/pg-wcom/powerpc.env
+++ b/include/environment/pg-wcom/powerpc.env
@@ -1,3 +1,5 @@
+#define BOOTFLASH_START 0xF0000000
+
arch=ppc_82xx
bootm_mapsize=CONFIG_SYS_BOOTM_LEN
checkfdt=true
diff --git a/include/log.h b/include/log.h
index 8a7b961..3bab40b 100644
--- a/include/log.h
+++ b/include/log.h
@@ -100,6 +100,8 @@
LOGC_BOOT,
/** @LOGC_EVENT: Related to event and event handling */
LOGC_EVENT,
+ /** @LOGC_FS: Related to filesystems */
+ LOGC_FS,
/** @LOGC_COUNT: Number of log categories */
LOGC_COUNT,
/** @LOGC_END: Sentinel value for lists of log categories */
diff --git a/include/qfw.h b/include/qfw.h
index 7ca132e..42798fe 100644
--- a/include/qfw.h
+++ b/include/qfw.h
@@ -316,4 +316,17 @@
*/
int qemu_cpu_fixup(void);
+/*
+ * qemu_fwcfg_setup_kernel() - Prepare the kernel for zboot
+ *
+ * Loads kernel data to 'load_addr', initrd to 'initrd_addr' and kernel command
+ * line using qemu fw_cfg interface
+ *
+ * @load_addr: Load address for kernel
+ * @initrd_addr: Load address for ramdisk
+ * @return 0 if OK, -ENOENT if no kernel
+ */
+int qemu_fwcfg_setup_kernel(struct udevice *qfw_dev, ulong load_addr,
+ ulong initrd_addr);
+
#endif
diff --git a/include/test/suites.h b/include/test/suites.h
index 9ce49cb..7c4960c 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -49,6 +49,7 @@
int do_ut_overlay(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[]);
int do_ut_print(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_seama(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_setexpr(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[]);
int do_ut_str(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
diff --git a/lib/Kconfig b/lib/Kconfig
index 549bd35..59e4304 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -1028,7 +1028,6 @@
config LMB_USE_MAX_REGIONS
bool "Use a common number of memory and reserved regions in lmb lib"
depends on LMB
- default y
help
Define the number of supported memory regions in the library logical
memory blocks.
diff --git a/lib/lmb.c b/lib/lmb.c
index ec79076..f447c63 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -175,11 +175,14 @@
return 1;
for (i = 0, map = memmap; i < map_size / sizeof(*map); ++map, ++i) {
- if (map->type != EFI_CONVENTIONAL_MEMORY)
- lmb_reserve(lmb,
- map_to_sysmem((void *)(uintptr_t)
- map->physical_start),
- map->num_pages * EFI_PAGE_SIZE);
+ if (map->type != EFI_CONVENTIONAL_MEMORY) {
+ lmb_reserve_flags(lmb,
+ map_to_sysmem((void *)(uintptr_t)
+ map->physical_start),
+ map->num_pages * EFI_PAGE_SIZE,
+ map->type == EFI_RESERVED_MEMORY_TYPE
+ ? LMB_NOMAP : LMB_NONE);
+ }
}
efi_free_pool(memmap);
diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c
index ef5215b..e1eb8cc 100644
--- a/test/boot/bootdev.c
+++ b/test/boot/bootdev.c
@@ -18,7 +18,11 @@
#include "bootstd_common.h"
/* Allow reseting the USB-started flag */
+#if defined(CONFIG_USB_HOST) || defined(CONFIG_USB_GADGET)
extern char usb_started;
+#else
+char usb_started;
+#endif
/* Check 'bootdev list' command */
static int bootdev_test_cmd_list(struct unit_test_state *uts)
@@ -316,11 +320,12 @@
ut_assert_nextline(" 5 ide ide_bootdev");
ut_assert_nextline(" 2 mmc mmc_bootdev");
ut_assert_nextline(" 4 nvme nvme_bootdev");
+ ut_assert_nextline(" 4 qfw qfw_bootdev");
ut_assert_nextline(" 4 scsi scsi_bootdev");
ut_assert_nextline(" 4 spi_flash sf_bootdev");
ut_assert_nextline(" 5 usb usb_bootdev");
ut_assert_nextline(" 4 virtio virtio_bootdev");
- ut_assert_nextline("(total hunters: 9)");
+ ut_assert_nextline("(total hunters: 10)");
ut_assert_console_end();
ut_assertok(bootdev_hunt("usb1", false));
@@ -328,8 +333,8 @@
"Bus usb@1: scanning bus usb@1 for devices... 5 USB Device(s) found");
ut_assert_console_end();
- /* USB is sixth in the list, so bit 7 */
- ut_asserteq(BIT(7), std->hunters_used);
+ /* USB is 7th in the list, so bit 8 */
+ ut_asserteq(BIT(8), std->hunters_used);
return 0;
}
@@ -350,7 +355,7 @@
ut_assert_nextline("Prio Used Uclass Hunter");
ut_assert_nextlinen("----");
ut_assert_nextline(" 6 ethernet eth_bootdev");
- ut_assert_skip_to_line("(total hunters: 9)");
+ ut_assert_skip_to_line("(total hunters: 10)");
ut_assert_console_end();
/* Use the MMC hunter and see that it updates */
@@ -358,7 +363,7 @@
ut_assertok(run_command("bootdev hunt -l", 0));
ut_assert_skip_to_line(" 5 ide ide_bootdev");
ut_assert_nextline(" 2 * mmc mmc_bootdev");
- ut_assert_skip_to_line("(total hunters: 9)");
+ ut_assert_skip_to_line("(total hunters: 10)");
ut_assert_console_end();
/* Scan all hunters */
@@ -376,6 +381,7 @@
/* mmc hunter has already been used so should not run again */
ut_assert_nextline("Hunting with: nvme");
+ ut_assert_nextline("Hunting with: qfw");
ut_assert_nextline("Hunting with: scsi");
ut_assert_nextline("scanning bus for devices...");
ut_assert_skip_to_line("Hunting with: spi_flash");
@@ -394,11 +400,12 @@
ut_assert_nextline(" 5 * ide ide_bootdev");
ut_assert_nextline(" 2 * mmc mmc_bootdev");
ut_assert_nextline(" 4 * nvme nvme_bootdev");
+ ut_assert_nextline(" 4 * qfw qfw_bootdev");
ut_assert_nextline(" 4 * scsi scsi_bootdev");
ut_assert_nextline(" 4 * spi_flash sf_bootdev");
ut_assert_nextline(" 5 * usb usb_bootdev");
ut_assert_nextline(" 4 * virtio virtio_bootdev");
- ut_assert_nextline("(total hunters: 9)");
+ ut_assert_nextline("(total hunters: 10)");
ut_assert_console_end();
ut_asserteq(GENMASK(MAX_HUNTER, 0), std->hunters_used);
@@ -585,8 +592,8 @@
ut_asserteq_str("scsi.id0lun0.bootdev", dev->name);
ut_asserteq(BOOTFLOW_METHF_SINGLE_UCLASS, mflags);
- /* SCSI is sixth in the list, so bit 5 */
- ut_asserteq(BIT(MMC_HUNTER) | BIT(5), std->hunters_used);
+ /* SCSI is 7th in the list, so bit 6 */
+ ut_asserteq(BIT(MMC_HUNTER) | BIT(6), std->hunters_used);
ut_assertok(bootdev_next_label(&iter, &dev, &mflags));
ut_assert_console_end();
@@ -596,7 +603,7 @@
mflags);
/* dhcp: Ethernet is first so bit 0 */
- ut_asserteq(BIT(MMC_HUNTER) | BIT(5) | BIT(0), std->hunters_used);
+ ut_asserteq(BIT(MMC_HUNTER) | BIT(6) | BIT(0), std->hunters_used);
ut_assertok(bootdev_next_label(&iter, &dev, &mflags));
ut_assert_console_end();
@@ -606,7 +613,7 @@
mflags);
/* pxe: Ethernet is first so bit 0 */
- ut_asserteq(BIT(MMC_HUNTER) | BIT(5) | BIT(0), std->hunters_used);
+ ut_asserteq(BIT(MMC_HUNTER) | BIT(6) | BIT(0), std->hunters_used);
mflags = 123;
ut_asserteq(-ENODEV, bootdev_next_label(&iter, &dev, &mflags));
@@ -614,7 +621,7 @@
ut_assert_console_end();
/* no change */
- ut_asserteq(BIT(MMC_HUNTER) | BIT(5) | BIT(0), std->hunters_used);
+ ut_asserteq(BIT(MMC_HUNTER) | BIT(6) | BIT(0), std->hunters_used);
return 0;
}
diff --git a/test/boot/bootstd_common.h b/test/boot/bootstd_common.h
index 136a79b..4a126e4 100644
--- a/test/boot/bootstd_common.h
+++ b/test/boot/bootstd_common.h
@@ -21,7 +21,7 @@
#define TEST_VERNUM 0x00010002
enum {
- MAX_HUNTER = 8,
+ MAX_HUNTER = 9,
MMC_HUNTER = 3, /* ID of MMC hunter */
};
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index 09e410e..2ffde87 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -16,6 +16,7 @@
obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o
obj-$(CONFIG_CMD_PINMUX) += pinmux.o
obj-$(CONFIG_CMD_PWM) += pwm.o
+obj-$(CONFIG_CMD_SEAMA) += seama.o
ifdef CONFIG_SANDBOX
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
endif
diff --git a/test/cmd/seama.c b/test/cmd/seama.c
new file mode 100644
index 0000000..b1b5693
--- /dev/null
+++ b/test/cmd/seama.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Executes tests for SEAMA (SEAttle iMAge) command
+ *
+ * Copyright (C) 2021 Linus Walleij <linus.walleij@linaro.org>
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <test/suites.h>
+#include <test/test.h>
+#include <test/ut.h>
+
+#define SEAMA_TEST(_name, _flags) UNIT_TEST(_name, _flags, seama_test)
+
+static int seama_test_noargs(struct unit_test_state *uts)
+{
+ /* Test that 'seama' with no arguments fails gracefully */
+ console_record_reset();
+ run_command("seama", 0);
+ ut_assert_nextlinen("seama - Load the SEAMA image and sets envs");
+ ut_assert_skipline();
+ ut_assert_skipline();
+ ut_assert_skipline();
+ ut_assert_skipline();
+ ut_assert_console_end();
+ return 0;
+}
+SEAMA_TEST(seama_test_noargs, UT_TESTF_CONSOLE_REC);
+
+static int seama_test_addr(struct unit_test_state *uts)
+{
+ /* Test that loads SEAMA image 0 to address 0x01000000 */
+ console_record_reset();
+ run_command("seama 0x01000000", 0);
+ ut_assert_nextlinen("Loading SEAMA image 0 from nand0");
+ ut_assert_nextlinen("SEMA IMAGE:");
+ ut_assert_nextlinen(" metadata size ");
+ ut_assert_nextlinen(" image size ");
+ ut_assert_nextlinen(" checksum ");
+ ut_assert_nextlinen("Decoding SEAMA image 0x01000040..");
+ ut_assert_console_end();
+ return 0;
+}
+SEAMA_TEST(seama_test_addr, UT_TESTF_CONSOLE_REC);
+
+static int seama_test_index(struct unit_test_state *uts)
+{
+ /* Test that loads SEAMA image 0 exlicitly specified */
+ console_record_reset();
+ run_command("seama 0x01000000 0", 0);
+ ut_assert_nextlinen("Loading SEAMA image 0 from nand0");
+ ut_assert_nextlinen("SEMA IMAGE:");
+ ut_assert_nextlinen(" metadata size ");
+ ut_assert_nextlinen(" image size ");
+ ut_assert_nextlinen(" checksum ");
+ ut_assert_nextlinen("Decoding SEAMA image 0x01000040..");
+ ut_assert_console_end();
+ return 0;
+}
+SEAMA_TEST(seama_test_index, UT_TESTF_CONSOLE_REC);
+
+int do_ut_seama(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+ struct unit_test *tests = UNIT_TEST_SUITE_START(seama_test);
+ const int n_ents = UNIT_TEST_SUITE_COUNT(seama_test);
+
+ return cmd_ut_category("seama", "seama_test_", tests, n_ents, argc,
+ argv);
+}
diff --git a/test/cmd_ut.c b/test/cmd_ut.c
index 1713d0d..409c22b 100644
--- a/test/cmd_ut.c
+++ b/test/cmd_ut.c
@@ -110,6 +110,9 @@
#ifdef CONFIG_CMD_LOADM
U_BOOT_CMD_MKENT(loadm, CONFIG_SYS_MAXARGS, 1, do_ut_loadm, "", ""),
#endif
+#ifdef CONFIG_CMD_SEAMA
+ U_BOOT_CMD_MKENT(seama, CONFIG_SYS_MAXARGS, 1, do_ut_seama, "", ""),
+#endif
};
static int do_ut_all(struct cmd_tbl *cmdtp, int flag, int argc,
@@ -212,6 +215,9 @@
#ifdef CONFIG_SANDBOX
"\nstr - basic test of string functions"
#endif
+#ifdef CONFIG_CMD_SEAMA
+ "\nseama - seama command parameters loading and decoding"
+#endif
#ifdef CONFIG_UT_TIME
"\ntime - very basic test of time functions"
#endif
diff --git a/tools/default_image.c b/tools/default_image.c
index 0ac3382..dc429ce 100644
--- a/tools/default_image.c
+++ b/tools/default_image.c
@@ -50,6 +50,12 @@
struct legacy_img_hdr header;
struct legacy_img_hdr *hdr = &header;
+ if (image_size < sizeof(struct legacy_img_hdr)) {
+ debug("%s: Bad image size: \"%s\" is no valid image\n",
+ params->cmdname, params->imagefile);
+ return -FDT_ERR_BADSTRUCTURE;
+ }
+
/*
* create copy of header so that we can blank out the
* checksum field for checking - this can't be done
@@ -76,7 +82,17 @@
}
data = (const unsigned char *)ptr + sizeof(struct legacy_img_hdr);
- len = image_size - sizeof(struct legacy_img_hdr);
+ len = image_get_data_size(hdr);
+
+ if (image_get_type(hdr) == IH_TYPE_FIRMWARE_IVT)
+ /* Add size of CSF minus IVT */
+ len -= 0x2060 - sizeof(flash_header_v2_t);
+
+ if (image_size - sizeof(struct legacy_img_hdr) < len) {
+ debug("%s: Bad image size: \"%s\" is no valid image\n",
+ params->cmdname, params->imagefile);
+ return -FDT_ERR_BADSTRUCTURE;
+ }
checksum = be32_to_cpu(hdr->ih_dcrc);
if (crc32(0, data, len) != checksum) {
diff --git a/tools/imagetool.c b/tools/imagetool.c
index f14ca2f..87eee4a 100644
--- a/tools/imagetool.c
+++ b/tools/imagetool.c
@@ -49,6 +49,12 @@
return imagetool_verify_print_header_by_type(ptr, sbuf, tparams, params);
for (curr = start; curr != end; curr++) {
+ /*
+ * Basically every data file can be guessed / verified as gpimage,
+ * so skip autodetection of data file as gpimage as it does not work.
+ */
+ if ((*curr)->check_image_type && (*curr)->check_image_type(IH_TYPE_GPIMAGE) == 0)
+ continue;
if ((*curr)->verify_header) {
retval = (*curr)->verify_header((unsigned char *)ptr,
sbuf->st_size, params);
@@ -71,6 +77,11 @@
}
}
+ if (retval != 0) {
+ fprintf(stderr, "%s: cannot detect image type\n",
+ params->cmdname);
+ }
+
return retval;
}
@@ -105,7 +116,7 @@
}
} else {
- fprintf(stderr, "%s: print_header undefined for %s\n",
+ fprintf(stderr, "%s: verify_header undefined for %s\n",
params->cmdname, tparams->name);
}