rockchip: arm64: rk3399: syscon addition for rk3399
rk3399 has different syscon registers which may used in spl,
add to support rk3399 spl.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index 2cef68b..d32985b 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -12,6 +12,8 @@
static const struct udevice_id rk3399_syscon_ids[] = {
{ .compatible = "rockchip,rk3399-grf", .data = ROCKCHIP_SYSCON_GRF },
{ .compatible = "rockchip,rk3399-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
+ { .compatible = "rockchip,rk3399-pmusgrf", .data = ROCKCHIP_SYSCON_PMUSGRF },
+ { .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC },
};
U_BOOT_DRIVER(syscon_rk3399) = {
@@ -19,3 +21,41 @@
.id = UCLASS_SYSCON,
.of_match = rk3399_syscon_ids,
};
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int rk3399_syscon_bind_of_platdata(struct udevice *dev)
+{
+ dev->driver_data = dev->driver->of_match->data;
+ debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
+
+ return 0;
+}
+
+U_BOOT_DRIVER(rockchip_rk3399_grf) = {
+ .name = "rockchip_rk3399_grf",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3399_syscon_ids,
+ .bind = rk3399_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3399_pmugrf) = {
+ .name = "rockchip_rk3399_pmugrf",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3399_syscon_ids + 1,
+ .bind = rk3399_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3399_pmusgrf) = {
+ .name = "rockchip_rk3399_pmusgrf",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3399_syscon_ids + 2,
+ .bind = rk3399_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3399_cic) = {
+ .name = "rockchip_rk3399_cic",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3399_syscon_ids + 3,
+ .bind = rk3399_syscon_bind_of_platdata,
+};
+#endif