diff --git a/drivers/clk/exynos/clk-exynos850.c b/drivers/clk/exynos/clk-exynos850.c
index de4170c..f11c1ff 100644
--- a/drivers/clk/exynos/clk-exynos850.c
+++ b/drivers/clk/exynos/clk-exynos850.c
@@ -10,6 +10,11 @@
 #include <dt-bindings/clock/exynos850.h>
 #include "clk.h"
 
+enum exynos850_cmu_id {
+	CMU_TOP,
+	CMU_PERI,
+};
+
 /* ---- CMU_TOP ------------------------------------------------------------- */
 
 /* Register Offset definitions for CMU_TOP (0x120e0000) */
@@ -124,7 +129,7 @@
 
 static int exynos850_cmu_top_probe(struct udevice *dev)
 {
-	return samsung_cmu_register_one(dev, top_cmu_clks,
+	return samsung_cmu_register_one(dev, CMU_TOP, top_cmu_clks,
 					ARRAY_SIZE(top_cmu_clks));
 }
 
@@ -133,11 +138,13 @@
 	{ }
 };
 
+SAMSUNG_CLK_OPS(exynos850_cmu_top, CMU_TOP);
+
 U_BOOT_DRIVER(exynos850_cmu_top) = {
 	.name		= "exynos850-cmu-top",
 	.id		= UCLASS_CLK,
 	.of_match	= exynos850_cmu_top_ids,
-	.ops		= &ccf_clk_ops,
+	.ops		= &exynos850_cmu_top_clk_ops,
 	.probe		= exynos850_cmu_top_probe,
 	.flags		= DM_FLAG_PRE_RELOC,
 };
@@ -175,7 +182,8 @@
 
 static int exynos850_cmu_peri_probe(struct udevice *dev)
 {
-	return samsung_register_cmu(dev, peri_cmu_clks, exynos850_cmu_top);
+	return samsung_register_cmu(dev, CMU_PERI, peri_cmu_clks,
+				    exynos850_cmu_top);
 }
 
 static const struct udevice_id exynos850_cmu_peri_ids[] = {
@@ -183,11 +191,13 @@
 	{ }
 };
 
+SAMSUNG_CLK_OPS(exynos850_cmu_peri, CMU_PERI);
+
 U_BOOT_DRIVER(exynos850_cmu_peri) = {
 	.name		= "exynos850-cmu-peri",
 	.id		= UCLASS_CLK,
 	.of_match	= exynos850_cmu_peri_ids,
-	.ops		= &ccf_clk_ops,
+	.ops		= &exynos850_cmu_peri_clk_ops,
 	.probe		= exynos850_cmu_peri_probe,
 	.flags		= DM_FLAG_PRE_RELOC,
 };
diff --git a/drivers/clk/exynos/clk-pll.c b/drivers/clk/exynos/clk-pll.c
index 4aacbc2..542d577 100644
--- a/drivers/clk/exynos/clk-pll.c
+++ b/drivers/clk/exynos/clk-pll.c
@@ -136,7 +136,7 @@
 	return clk;
 }
 
-void samsung_clk_register_pll(void __iomem *base,
+void samsung_clk_register_pll(void __iomem *base, unsigned int cmu_id,
 			      const struct samsung_pll_clock *clk_list,
 			      unsigned int nr_clk)
 {
@@ -145,10 +145,12 @@
 	for (cnt = 0; cnt < nr_clk; cnt++) {
 		struct clk *clk;
 		const struct samsung_pll_clock *pll_clk;
+		unsigned long clk_id;
 
 		pll_clk = &clk_list[cnt];
 		clk = _samsung_clk_register_pll(base, pll_clk);
-		clk_dm(pll_clk->id, clk);
+		clk_id = SAMSUNG_TO_CLK_ID(cmu_id, pll_clk->id);
+		clk_dm(clk_id, clk);
 	}
 }
 
diff --git a/drivers/clk/exynos/clk-pll.h b/drivers/clk/exynos/clk-pll.h
index 00c7506..bdc94e7 100644
--- a/drivers/clk/exynos/clk-pll.h
+++ b/drivers/clk/exynos/clk-pll.h
@@ -22,7 +22,7 @@
 	pll_0831x,
 };
 
-void samsung_clk_register_pll(void __iomem *base,
+void samsung_clk_register_pll(void __iomem *base, unsigned int cmu_id,
 			      const struct samsung_pll_clock *clk_list,
 			      unsigned int nr_clk);
 
diff --git a/drivers/clk/exynos/clk.c b/drivers/clk/exynos/clk.c
index 14ccd2c..943e8bd 100644
--- a/drivers/clk/exynos/clk.c
+++ b/drivers/clk/exynos/clk.c
@@ -10,61 +10,67 @@
 #include <dm.h>
 #include "clk.h"
 
-static void samsung_clk_register_mux(void __iomem *base,
-			      const struct samsung_mux_clock *clk_list,
-			      unsigned int nr_clk)
+static void samsung_clk_register_mux(void __iomem *base, unsigned int cmu_id,
+				     const struct samsung_mux_clock *clk_list,
+				     unsigned int nr_clk)
 {
 	unsigned int cnt;
 
 	for (cnt = 0; cnt < nr_clk; cnt++) {
 		struct clk *clk;
 		const struct samsung_mux_clock *m;
+		unsigned long clk_id;
 
 		m = &clk_list[cnt];
 		clk = clk_register_mux(NULL, m->name, m->parent_names,
 			m->num_parents, m->flags, base + m->offset, m->shift,
 			m->width, m->mux_flags);
-		clk_dm(m->id, clk);
+		clk_id = SAMSUNG_TO_CLK_ID(cmu_id, m->id);
+		clk_dm(clk_id, clk);
 	}
 }
 
-static void samsung_clk_register_div(void __iomem *base,
-			      const struct samsung_div_clock *clk_list,
-			      unsigned int nr_clk)
+static void samsung_clk_register_div(void __iomem *base, unsigned int cmu_id,
+				     const struct samsung_div_clock *clk_list,
+				     unsigned int nr_clk)
 {
 	unsigned int cnt;
 
 	for (cnt = 0; cnt < nr_clk; cnt++) {
 		struct clk *clk;
 		const struct samsung_div_clock *d;
+		unsigned long clk_id;
 
 		d = &clk_list[cnt];
 		clk = clk_register_divider(NULL, d->name, d->parent_name,
 			d->flags, base + d->offset, d->shift,
 			d->width, d->div_flags);
-		clk_dm(d->id, clk);
+		clk_id = SAMSUNG_TO_CLK_ID(cmu_id, d->id);
+		clk_dm(clk_id, clk);
 	}
 }
 
-static void samsung_clk_register_gate(void __iomem *base,
-			       const struct samsung_gate_clock *clk_list,
-			       unsigned int nr_clk)
+static void samsung_clk_register_gate(void __iomem *base, unsigned int cmu_id,
+				      const struct samsung_gate_clock *clk_list,
+				      unsigned int nr_clk)
 {
 	unsigned int cnt;
 
 	for (cnt = 0; cnt < nr_clk; cnt++) {
 		struct clk *clk;
 		const struct samsung_gate_clock *g;
+		unsigned long clk_id;
 
 		g = &clk_list[cnt];
 		clk = clk_register_gate(NULL, g->name, g->parent_name,
 			g->flags, base + g->offset, g->bit_idx,
 			g->gate_flags, NULL);
-		clk_dm(g->id, clk);
+		clk_id = SAMSUNG_TO_CLK_ID(cmu_id, g->id);
+		clk_dm(clk_id, clk);
 	}
 }
 
-typedef void (*samsung_clk_register_fn)(void __iomem *base,
+typedef void (*samsung_clk_register_fn)(void __iomem *base, unsigned int cmu_id,
 					const void *clk_list,
 					unsigned int nr_clk);
 
@@ -78,13 +84,14 @@
 /**
  * samsung_cmu_register_clocks() - Register provided clock groups
  * @base: Base address of CMU registers
+ * @cmu_id: CMU index number
  * @clk_groups: list of clock groups
  * @nr_groups: count of clock groups in @clk_groups
  *
  * Having the array of clock groups @clk_groups makes it possible to keep a
  * correct clocks registration order.
  */
-static void samsung_cmu_register_clocks(void __iomem *base,
+static void samsung_cmu_register_clocks(void __iomem *base, unsigned int cmu_id,
 				const struct samsung_clk_group *clk_groups,
 				unsigned int nr_groups)
 {
@@ -93,19 +100,21 @@
 	for (i = 0; i < nr_groups; i++) {
 		const struct samsung_clk_group *g = &clk_groups[i];
 
-		samsung_clk_register_fns[g->type](base, g->clk_list, g->nr_clk);
+		samsung_clk_register_fns[g->type](base, cmu_id,
+						  g->clk_list, g->nr_clk);
 	}
 }
 
 /**
  * samsung_cmu_register_one - Register all CMU clocks
  * @dev: CMU device
+ * @cmu_id: CMU index number
  * @clk_groups: list of CMU clock groups
  * @nr_groups: count of CMU clock groups in @clk_groups
  *
  * Return: 0 on success or negative value on error.
  */
-int samsung_cmu_register_one(struct udevice *dev,
+int samsung_cmu_register_one(struct udevice *dev, unsigned int cmu_id,
 			     const struct samsung_clk_group *clk_groups,
 			     unsigned int nr_groups)
 {
@@ -115,7 +124,7 @@
 	if (!base)
 		return -EINVAL;
 
-	samsung_cmu_register_clocks(base, clk_groups, nr_groups);
+	samsung_cmu_register_clocks(base, cmu_id, clk_groups, nr_groups);
 
 	return 0;
 }
diff --git a/drivers/clk/exynos/clk.h b/drivers/clk/exynos/clk.h
index 14e06b2..ed0a395 100644
--- a/drivers/clk/exynos/clk.h
+++ b/drivers/clk/exynos/clk.h
@@ -13,6 +13,51 @@
 #include <linux/clk-provider.h>
 #include "clk-pll.h"
 
+#define _SAMSUNG_CLK_OPS(_name, _cmu)					\
+static int _name##_of_xlate(struct clk *clk,				\
+			    struct ofnode_phandle_args *args)		\
+{									\
+	if (args->args_count > 1) {					\
+		debug("Invalid args_count: %d\n", args->args_count);	\
+		return -EINVAL;						\
+	}								\
+									\
+	if (args->args_count)						\
+		clk->id = SAMSUNG_TO_CLK_ID(_cmu, args->args[0]);	\
+	else								\
+		clk->id = 0;						\
+									\
+	return 0;							\
+}									\
+									\
+static const struct clk_ops _name##_clk_ops = {				\
+	.set_rate = ccf_clk_set_rate,					\
+	.get_rate = ccf_clk_get_rate,					\
+	.set_parent = ccf_clk_set_parent,				\
+	.enable = ccf_clk_enable,					\
+	.disable = ccf_clk_disable,					\
+	.of_xlate = _name##_of_xlate,					\
+}
+
+/**
+ * SAMSUNG_CLK_OPS - Define clock operations structure for specified CMU.
+ * @name: name of generated structure
+ * @cmu: CMU index
+ *
+ * Like ccf_clk_ops, but with custom .of_xlate callback.
+ */
+#define SAMSUNG_CLK_OPS(name, cmu) _SAMSUNG_CLK_OPS(name, cmu)
+
+/**
+ * SAMSUNG_TO_CLK_ID - Calculate a global clock index.
+ * @_cmu: CMU index
+ * @_id: local clock index (unique across @_cmu)
+ *
+ * Return: A global clock index unique across all CMUs.
+ * Keeps a range of 256 available clocks for every CMU.
+ */
+#define SAMSUNG_TO_CLK_ID(_cmu, _id)	(((_cmu) << 8) | ((_id) & 0xff))
+
 /**
  * struct samsung_mux_clock - information about mux clock
  * @id: platform specific id of the clock
@@ -179,13 +224,14 @@
 	unsigned int nr_clk;
 };
 
-int samsung_cmu_register_one(struct udevice *dev,
+int samsung_cmu_register_one(struct udevice *dev, unsigned int cmu_id,
 			     const struct samsung_clk_group *clk_groups,
 			     unsigned int nr_groups);
 
 /**
  * samsung_register_cmu - Register CMU clocks ensuring parent CMU is present
  * @dev: CMU device
+ * @cmu_id: CMU index number
  * @clk_groups: list of CMU clock groups
  * @parent_drv: name of parent CMU driver
  *
@@ -194,7 +240,7 @@
  *
  * Return: 0 on success or negative value on error.
  */
-#define samsung_register_cmu(dev, clk_groups, parent_drv)		\
+#define samsung_register_cmu(dev, cmu_id, clk_groups, parent_drv)	\
 ({									\
 	struct udevice *__parent;					\
 	int __ret;							\
@@ -204,8 +250,8 @@
 	if (__ret || !__parent)						\
 		__ret = -ENOENT;					\
 	else								\
-		__ret = samsung_cmu_register_one(dev, clk_groups,	\
-			ARRAY_SIZE(clk_groups));			\
+		__ret = samsung_cmu_register_one(dev, cmu_id,		\
+			clk_groups, ARRAY_SIZE(clk_groups));		\
 	__ret;								\
 })