clk: mediatek: mt7622: move INFRA_TRNG to the bottom
Move INFRA_TRNG clock to the bottom of the clk ID to match upstream
linux order. This is in preparation of OF_UPSTREAM.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c
index 4a7c5fa..8f173b7 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -382,11 +382,11 @@
static const struct mtk_gate infra_cgs[] = {
GATE_INFRA(CLK_INFRA_DBGCLK_PD, CLK_TOP_AXI_SEL, 0),
- GATE_INFRA(CLK_INFRA_TRNG, CLK_TOP_AXI_SEL, 2),
GATE_INFRA(CLK_INFRA_AUDIO_PD, CLK_TOP_AUD_INTBUS_SEL, 5),
GATE_INFRA(CLK_INFRA_IRRX_PD, CLK_TOP_IRRX_SEL, 16),
GATE_INFRA(CLK_INFRA_APXGPT_PD, CLK_TOP_F10M_REF_SEL, 18),
GATE_INFRA(CLK_INFRA_PMIC_PD, CLK_TOP_PMICSPI_SEL, 22),
+ GATE_INFRA(CLK_INFRA_TRNG, CLK_TOP_AXI_SEL, 2),
};
/* pericfg */
diff --git a/include/dt-bindings/clock/mt7622-clk.h b/include/dt-bindings/clock/mt7622-clk.h
index 78804f4..2f36abc 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -121,11 +121,11 @@
/* INFRACFG */
#define CLK_INFRA_DBGCLK_PD 0
-#define CLK_INFRA_TRNG 1
-#define CLK_INFRA_AUDIO_PD 2
-#define CLK_INFRA_IRRX_PD 3
-#define CLK_INFRA_APXGPT_PD 4
-#define CLK_INFRA_PMIC_PD 5
+#define CLK_INFRA_AUDIO_PD 1
+#define CLK_INFRA_IRRX_PD 2
+#define CLK_INFRA_APXGPT_PD 3
+#define CLK_INFRA_PMIC_PD 4
+#define CLK_INFRA_TRNG 5
/* PERICFG */