x86: tangier: Fix off-by-one error when preparing CSRT
Intel iDMA 32-bit controller has 17 bits for the maximum block size value.
Due to nature of the binary number representation the maximum value is
2^17 - 1. The original code misses the latter part in equation.
Fixes: 5e99fde34a77 ("x86: tangier: Populate CSRT for shared DMA controller")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c
index 362e133..8b12813 100644
--- a/arch/x86/cpu/tangier/acpi.c
+++ b/arch/x86/cpu/tangier/acpi.c
@@ -95,7 +95,7 @@
si->dma_address_width = 32;
si->base_request_line = 0;
si->num_handshake_signals = 16;
- si->max_block_size = 0x20000;
+ si->max_block_size = 0x1ffff;
return grp->length;
}