| commit | be389f66e7d06b7ba076dffd3459e8a0c4f6fb18 | [log] [tgz] |
|---|---|---|
| author | Pratyush Yadav <p.yadav@ti.com> | Sat Jun 26 00:47:16 2021 +0530 |
| committer | Jagan Teki <jagan@amarulasolutions.com> | Mon Jun 28 12:00:32 2021 +0530 |
| tree | 9ba7d3394f50aaf8b05514bd8ac27c91f0ff10e3 | |
| parent | d5baf16315b2e211ee7f09beaf3f1e3f622691b7 [diff] |
mtd: spi-nor-core: Add support for DTR protocol Double Transfer Rate (DTR) is SPI protocol in which data is transferred on each clock edge as opposed to on each clock cycle. Make framework-level changes to allow supporting flashes in DTR mode. Right now, mixed DTR modes are not supported. So, for example a mode like 4S-4D-4D will not work. All phases need to be either DTR or STR. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>