tree 22fd31ba28e39ef170ff177d053413c876b6908b
parent e2e79dde57086274bab116e0051616c8511357ed
author Tien Fong Chee <tien.fong.chee@intel.com> 1739867694 +0800
committer Tom Rini <trini@konsulko.com> 1740502428 -0600

arm: dts: agilex5: Add HPS cache coherency unit configuration settings

These configuration settings are required to enable cache maintenance and
access between initiators and targets.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>