| commit | a22800bc314f370853316d1915699a1c89d1572c | [log] [tgz] |
|---|---|---|
| author | Michael Bode <michael.bode@bshg.com> | Wed May 21 11:47:32 2025 +0200 |
| committer | Fabio Estevam <festevam@gmail.com> | Wed May 21 07:53:13 2025 -0300 |
| tree | 77dc4029991fd4c5b49c7eaace145c1bef475319 | |
| parent | d906113c1cbc244ec948c58455944486af7c2069 [diff] |
board: bsh: imx6ulz_smm_m2: Add delay between DRAM read access A small delay between DRAM read access with wrong parameters and reconfiguration is necessary. Without a delay between DRAM read access and a following reconfiguration this reconfiguration fails for certain DRAM chips (Nanya). Signed-off-by: Michael Bode <michael.bode@bshg.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>