MIPS: allow override of flush_dcache_range()
Useful in custom HW designs which have a need to flush dcache
range in a completely non standard way.
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 502956d..1a8c87d 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -141,7 +141,7 @@
instruction_hazard_barrier();
}
-void flush_dcache_range(ulong start_addr, ulong stop)
+void __weak flush_dcache_range(ulong start_addr, ulong stop)
{
unsigned long lsize = dcache_line_size();
unsigned long slsize = scache_line_size();