commit 603e6381a95ea80c9df8c2a269dc2e1b4bbda423
author Peter Tyser <ptyser@xes-inc.com> Mon Oct 27 16:42:00 2008 -0500
committer Andrew Fleming-AFLEMING <afleming@freescale.com> Mon Oct 27 16:45:43 2008 -0500
tree 30016ac1c44a431c4356dd17a3de4cd274d1a472
parent 2617647965cd08b3cafcd1d13556f95b4ea6606a

85xx: Update MPC85xx_PORDEVSR_IO_SEL mask

The MPC8572 has a 4-bit wide PORDEVSR IO_SEL field. Other MPC85xx
processors have a 3-bit wide IO_SEL field but have the most
significant bit is wired to 0 so this change should not affect
them.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

include/asm-ppc/immap_85xx.h

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index ad30099..4892d8b 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1568,7 +1568,7 @@
 #define MPC85xx_PORDEVSR_SGMII3_DIS	0x08000000
 #define MPC85xx_PORDEVSR_SGMII4_DIS	0x04000000
 #define MPC85xx_PORDEVSR_SRDS2_IO_SEL   0x38000000
-#define MPC85xx_PORDEVSR_IO_SEL		0x00380000
+#define MPC85xx_PORDEVSR_IO_SEL		0x00780000
 #define MPC85xx_PORDEVSR_PCI2_ARB	0x00040000
 #define MPC85xx_PORDEVSR_PCI1_ARB	0x00020000
 #define MPC85xx_PORDEVSR_PCI1_PCI32	0x00010000