commit 5fc569ac8d81dad4f6674a953e685a639f5b5655
author Chander Kashyap <chander.kashyap@linaro.org> Sun Dec 18 20:16:32 2011 +0000
committer Albert ARIBAUD <albert.u.boot@aribaud.net> Sun Feb 12 10:11:29 2012 +0100
tree 675eed6014de909ddc971f4a4d7c4e894704a0be
parent 3c7721fc4fffd4d5bd1f54ee3c173de438e6c532

Origen: Select SCLKMPLL as FIMD0 parent clock

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

board/samsung/origen/lowlevel_init.S

diff --git a/board/samsung/origen/lowlevel_init.S b/board/samsung/origen/lowlevel_init.S
index 0eebbfc..9283201 100644
--- a/board/samsung/origen/lowlevel_init.S
+++ b/board/samsung/origen/lowlevel_init.S
@@ -158,6 +158,11 @@
 	ldr	r2, =CLK_SRC_PERIL0_OFFSET
 	str	r1, [r0, r2]
 
+	/* FIMD0 */
+	ldr	r1, =CLK_SRC_LCD0_VAL
+	ldr	r2, =CLK_SRC_LCD0_OFFSET
+	str	r1, [r0, r2]
+
 	/* wait ?us */
 	mov	r1, #0x10000
 3:	subs	r1, r1, #1