Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
diff --git a/MAINTAINERS b/MAINTAINERS
index 45e2dd4..175bbe2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -607,6 +607,7 @@
igep0020 ARM ARMV7 (OMAP3xx SoC)
igep0030 ARM ARMV7 (OMAP3xx SoC)
+ igep0032 ARM ARMV7 (OMAP3xx SoC)
Eric Benard <eric@eukrea.com>
diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c
index 2b584e0..1c8b617 100644
--- a/arch/arm/cpu/armv7/omap-common/boot-common.c
+++ b/arch/arm/cpu/armv7/omap-common/boot-common.c
@@ -55,6 +55,9 @@
#ifdef CONFIG_SPL_NAND_SUPPORT
gpmc_init();
#endif
+#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
+ arch_misc_init();
+#endif
}
int board_mmc_init(bd_t *bis)
diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h
index 644ff35..e961ce0 100644
--- a/arch/arm/include/asm/arch-am33xx/spl.h
+++ b/arch/arm/include/asm/arch-am33xx/spl.h
@@ -29,6 +29,7 @@
#define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */
#define BOOT_DEVICE_SPI 11
#define BOOT_DEVICE_UART 65
+#define BOOT_DEVICE_USBETH 68
#define BOOT_DEVICE_CPGMAC 70
#define BOOT_DEVICE_MMC2_2 0xFF
#endif
diff --git a/arch/arm/include/asm/arch-davinci/gpio.h b/arch/arm/include/asm/arch-davinci/gpio.h
index ef65ffb..fbbb1f3 100644
--- a/arch/arm/include/asm/arch-davinci/gpio.h
+++ b/arch/arm/include/asm/arch-davinci/gpio.h
@@ -67,7 +67,11 @@
#define gpio_status() gpio_info()
#define GPIO_NAME_SIZE 20
+#if defined(CONFIG_SOC_DA8XX) && !defined(CONFIG_SOC_DA850)
+#define MAX_NUM_GPIOS 128
+#else
#define MAX_NUM_GPIOS 144
+#endif
#define GPIO_BANK(gp) (davinci_gpio_bank01 + ((gp) >> 5))
#define GPIO_BIT(gp) ((gp) & 0x1F)
diff --git a/board/isee/igep00x0/igep00x0.h b/board/isee/igep00x0/igep00x0.h
index ea1e9ac..5ef22ae 100644
--- a/board/isee/igep00x0/igep00x0.h
+++ b/board/isee/igep00x0/igep00x0.h
@@ -34,10 +34,13 @@
const omap3_sysinfo sysinfo = {
DDR_STACKED,
#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
- "OMAP3 IGEP v2 board",
+ "IGEPv2",
#endif
#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
- "OMAP3 IGEP COM Module",
+ "IGEP COM MODULE/ELECTRON",
+#endif
+#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
+ "IGEP COM PROTON",
#endif
#if defined(CONFIG_ENV_IS_IN_ONENAND)
"ONENAND",
diff --git a/board/matrix_vision/mvblx/fpga.c b/board/matrix_vision/mvblx/fpga.c
index dacc138..3fcf968 100644
--- a/board/matrix_vision/mvblx/fpga.c
+++ b/board/matrix_vision/mvblx/fpga.c
@@ -31,6 +31,7 @@
#include <ACEX1K.h>
#include <command.h>
#include <asm/gpio.h>
+#include <linux/byteorder/generic.h>
#include "fpga.h"
#ifdef FPGA_DEBUG
@@ -209,9 +210,20 @@
{
unsigned char *data = (unsigned char *) buf;
int i;
+ int headerlen = len - cyclone2.size;
+
+ if (headerlen < 0)
+ return FPGA_FAIL;
+ else if (headerlen == sizeof(uint32_t)) {
+ const unsigned int fpgavers_len = 11; /* '0x' + 8 hex digits + \0 */
+ char fpgavers_str[fpgavers_len];
+ snprintf(fpgavers_str, fpgavers_len, "0x%08x",
+ be32_to_cpup((uint32_t*)data));
+ setenv("fpgavers", fpgavers_str);
+ }
fpga_debug("fpga_wr: buf %p / size %d\n", buf, len);
- for (i = 0; i < len; i++)
+ for (i = headerlen; i < len; i++)
_write_fpga(data[i]);
fpga_debug("-%s\n", __func__);
diff --git a/board/matrix_vision/mvblx/sys_eeprom.c b/board/matrix_vision/mvblx/sys_eeprom.c
index 945a36d..15269c6 100644
--- a/board/matrix_vision/mvblx/sys_eeprom.c
+++ b/board/matrix_vision/mvblx/sys_eeprom.c
@@ -326,10 +326,28 @@
return 0;
}
+static inline int is_portrait(void)
+{
+ int i;
+ unsigned int orient_index = 0; /* idx of char which determines orientation */
+
+ for (i = sizeof(e.id)/sizeof(*e.id) - 1; i>=0; i--) {
+ if (e.id[i] == '-') {
+ orient_index = i+1;
+ break;
+ }
+ }
+
+ return (orient_index &&
+ (e.id[orient_index] >= '5') && (e.id[orient_index] <= '8'));
+}
+
int mac_read_from_eeprom(void)
{
u32 crc, crc_offset = offsetof(struct eeprom, crc);
u32 *crcp; /* Pointer to the CRC in the data read from the EEPROM */
+#define FILENAME_LANDSCAPE "mvBlueLynx_X.rbf"
+#define FILENAME_PORTRAIT "mvBlueLynx_X_sensor_cd.rbf"
if (read_eeprom()) {
printf("EEPROM Read failed.\n");
@@ -374,6 +392,12 @@
setenv("serial#", serial_num);
}
+ /* decide which fpga file to load depending on orientation */
+ if (is_portrait())
+ setenv("fpgafilename", FILENAME_PORTRAIT);
+ else
+ setenv("fpgafilename", FILENAME_LANDSCAPE);
+
/* TODO should I calculate CRC here? */
return 0;
}
diff --git a/board/phytec/pcm051/mux.c b/board/phytec/pcm051/mux.c
index 4d3a1d5..6e9c3d2 100644
--- a/board/phytec/pcm051/mux.c
+++ b/board/phytec/pcm051/mux.c
@@ -35,7 +35,6 @@
{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
- {OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */
{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
{-1},
};
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 48e6896..441758f 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -389,7 +389,8 @@
}
#endif
-#ifdef CONFIG_DRIVER_TI_CPSW
+#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
+ (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
static void cpsw_control(int enabled)
{
/* VTP can be added here */
@@ -434,26 +435,26 @@
int board_eth_init(bd_t *bis)
{
int rv, n = 0;
-#ifdef CONFIG_DRIVER_TI_CPSW
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
- printf("<ethaddr> not set. Reading from E-fuse\n");
- /* try reading mac address from efuse */
- mac_lo = readl(&cdev->macid0l);
- mac_hi = readl(&cdev->macid0h);
- mac_addr[0] = mac_hi & 0xFF;
- mac_addr[1] = (mac_hi & 0xFF00) >> 8;
- mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
- mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
- mac_addr[4] = mac_lo & 0xFF;
- mac_addr[5] = (mac_lo & 0xFF00) >> 8;
+ /* try reading mac address from efuse */
+ mac_lo = readl(&cdev->macid0l);
+ mac_hi = readl(&cdev->macid0h);
+ mac_addr[0] = mac_hi & 0xFF;
+ mac_addr[1] = (mac_hi & 0xFF00) >> 8;
+ mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
+ mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
+ mac_addr[4] = mac_lo & 0xFF;
+ mac_addr[5] = (mac_lo & 0xFF00) >> 8;
+
+#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
+ (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+ if (!getenv("ethaddr")) {
+ printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ether_addr(mac_addr))
eth_setenv_enetaddr("ethaddr", mac_addr);
- else
- goto try_usbether;
}
if (board_is_bone() || board_is_bone_lt() || board_is_idk()) {
@@ -494,8 +495,11 @@
AR8051_RGMII_TX_CLK_DLY);
}
#endif
-try_usbether:
-#if defined(CONFIG_USB_ETHER) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_USB_ETHER) && \
+ (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
+ if (is_valid_ether_addr(mac_addr))
+ eth_setenv_enetaddr("usbnet_devaddr", mac_addr);
+
rv = usb_eth_initialize(bis);
if (rv < 0)
printf("Error %d registering USB_ETHER\n", rv);
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index b829a79..58bd556 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -72,6 +72,7 @@
#define BBTOYS_LCD 0x03000B00
#define BCT_BRETTL3 0x01000F00
#define BCT_BRETTL4 0x02000F00
+#define LSR_COM6L_ADPT 0x01001300
#define BEAGLE_NO_EEPROM 0xffffffff
DECLARE_GLOBAL_DATA_PTR;
@@ -227,6 +228,14 @@
i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
sizeof(expansion_config));
+ /* retry reading configuration data with 16bit addressing */
+ if ((expansion_config.device_vendor == 0xFFFFFF00) ||
+ (expansion_config.device_vendor == 0xFFFFFFFF)) {
+ printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n");
+ i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config,
+ sizeof(expansion_config));
+ }
+
i2c_set_bus_num(TWL4030_I2C_BUS);
return expansion_config.device_vendor;
@@ -454,6 +463,11 @@
case BCT_BRETTL4:
printf("Recognized bct electronic GmbH brettl4 board\n");
break;
+ case LSR_COM6L_ADPT:
+ printf("Recognized LSR COM6L Adapter Board\n");
+ MUX_BBTOYS_WIFI()
+ setenv("buddy", "lsr-com6l-adpt");
+ break;
case BEAGLE_NO_EEPROM:
printf("No EEPROM on expansion board\n");
setenv("buddy", "none");
diff --git a/boards.cfg b/boards.cfg
index 2860859..7a0b79d 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -233,6 +233,7 @@
integratorcp_cm946es arm arm946es integrator armltd - integratorcp:CM946ES
ca9x4_ct_vxp arm armv7 vexpress armltd
am335x_evm arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1
+am335x_evm_spiboot arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT
am335x_evm_uart1 arm armv7 am335x ti am33xx am335x_evm:SERIAL2,CONS_INDEX=2
am335x_evm_uart2 arm armv7 am335x ti am33xx am335x_evm:SERIAL3,CONS_INDEX=3
am335x_evm_uart3 arm armv7 am335x ti am33xx am335x_evm:SERIAL4,CONS_INDEX=4
@@ -262,6 +263,7 @@
igep0020_nand arm armv7 igep00x0 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_NAND
igep0030 arm armv7 igep00x0 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_ONENAND
igep0030_nand arm armv7 igep00x0 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_NAND
+igep0032 arm armv7 igep00x0 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0032,BOOT_ONENAND
am3517_evm arm armv7 am3517evm logicpd omap3
mt_ventoux arm armv7 mt_ventoux teejet omap3
omap3_zoom1 arm armv7 zoom1 logicpd omap3
diff --git a/common/spl/spl.c b/common/spl/spl.c
index ff9ba7b..6a5a136 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -221,6 +221,11 @@
#endif
break;
#endif
+#ifdef CONFIG_SPL_USBETH_SUPPORT
+ case BOOT_DEVICE_USBETH:
+ spl_net_load_image("usb_ether");
+ break;
+#endif
default:
debug("SPL: Un-supported Boot Device\n");
hang();
diff --git a/doc/SPL/README.am335x-network b/doc/SPL/README.am335x-network
new file mode 100644
index 0000000..e5a198f
--- /dev/null
+++ b/doc/SPL/README.am335x-network
@@ -0,0 +1,92 @@
+USING AM335x NETBOOT FEATURE
+
+ Some boards (like TI AM335x based ones) have quite big on-chip RAM and
+have support for booting via network in ROM. The following describes
+how to setup network booting and then optionally use this support to flash
+NAND and bricked (empty) board with only a network cable.
+
+ I. Building the required images
+ 1. You have to enable generic SPL configuration options (see
+docs/README.SPL) as well as CONFIG_SPL_NET_SUPPORT,
+CONFIG_ETH_SUPPORT, CONFIG_SPL_LIBGENERIC_SUPPORT and
+CONFIG_SPL_LIBCOMMON_SUPPORT in your board configuration file to build
+SPL with support for booting over the network. Also you have to enable
+the driver for the NIC used and CONFIG_SPL_BOARD_INIT option if your
+board needs some board-specific initialization (TI AM335x EVM does).
+If you want SPL to use some Vendor Class Identifier (VCI) you can set
+one with CONFIG_SPL_NET_VCI_STRING option. am335x_evm configuration
+comes with support for network booting preconfigured.
+ 2. Define CONFIG_BOOTCOMMAND for your board to load and run debrick
+script after boot:
+#define CONFIG_BOOTCOMMAND \
+ "setenv autoload no; " \
+ "bootp; " \
+ "if tftp 80000000 debrick.scr; then " \
+ "source 80000000; " \
+ "fi"
+(Or create additional board configuration with such option).
+ 3. Build U-Boot as usual
+ $ make <your_board_name>
+ You will need u-boot.img and spl/u-boot.bin images to perform
+network boot. Copy them to u-boot-restore.img and
+u-boot-spl-restore.bin respectively to distinguish this version
+(with automatic restore running) from the main one.
+
+ II. Host configuration.
+ 1. Setup DHCP server (recommended server is ISC DHCPd).
+ - Install DHCP server and setup it to listen on the interface you
+chose to connect to the board (usually configured in
+/etc/default/dhcpd or /etc/default/isc-dhcp-server). Make sure there
+are no other active DHCP servers in the same network segment.
+ - Edit your dhcpd.conf and subnet declaration matching the address
+on the interface. Specify the range of assigned addresses and bootfile
+to use. IMPORTANT! Both RBL and SPL use the image filename provided
+in the BOOTP reply but obviously they need different images (RBL needs
+raw SPL image -- u-boot-spl-restore.bin while SPL needs main U-Boot
+image -- u-boot-restore.img). So you have to configure DHCP server to
+provide different image filenames to RBL and SPL (and possibly another
+one to main U-Boot). This can be done by checking Vendor Class
+Identifier (VCI) set by BOOTP client (RBL sets VCI to "DM814x ROM v1.0"
+and you can set VCI used by SPL with CONFIG_SPL_NET_VCI_STRING option,
+see above).
+ - If you plan to use TFTP server on another machine you have to set
+server-name option to point to it.
+ - Here is sample configuration for ISC DHCPd, assuming the interface
+used to connect to the board is eth0, and it has address 192.168.8.1:
+
+subnet 192.168.8.0 netmask 255.255.255.0 {
+ range dynamic-bootp 192.168.8.100 192.168.8.199;
+
+ if substring (option vendor-class-identifier, 0, 10) = "DM814x ROM" {
+ filename "u-boot-spl-restore.bin";
+ } elsif substring (option vendor-class-identifier, 0, 17) = "AM335x U-Boot SPL" {
+ filename "u-boot-restore.img";
+ } else {
+ filename "uImage";
+ }
+}
+
+ 2. Setup TFTP server.
+ Install TFTP server and put image files to it's root directory
+(likely /tftpboot or /var/lib/tftpboot or /srv/tftp). You will need
+u-boot.img and spl/u-boot-spl-bin files from U-Boot build directory.
+
+ III. Reflashing (debricking) the board.
+ 1. Write debrick script. You will need to write a script that will
+be executed after network boot to perform actual rescue actions. You
+can use usual U-Boot commands from this script: tftp to load additional
+files, nand erase/nand write to erase/write the NAND flash.
+
+ 2. Create script image from your script. From U-Boot build directory:
+
+$ ./tools/mkimage -A arm -O U-Boot -C none -T script -d <your script> debrick.scr
+
+This will create debrick.scr file with your script inside.
+
+ 3. Copy debrick.scr to TFTP root directory. You also need to copy
+there all the files your script tries to load via TFTP. Example script
+loads u-boot.img and MLO. You have to create these files doing regular
+(not restore_flash) build and copy them to tftpboot directory.
+
+ 4. Boot the board from the network, U-Boot will load debrick script
+and run it after boot.
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index 84d2b77..271b8d9 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -33,6 +33,138 @@
#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
+#if defined(CONFIG_SOC_DA8XX) && !defined(CONFIG_SOC_DA850)
+static const struct pinmux_config gpio_pinmux[] = {
+ { pinmux(13), 8, 6 }, /* GP0[0] */
+ { pinmux(13), 8, 7 },
+ { pinmux(14), 8, 0 },
+ { pinmux(14), 8, 1 },
+ { pinmux(14), 8, 2 },
+ { pinmux(14), 8, 3 },
+ { pinmux(14), 8, 4 },
+ { pinmux(14), 8, 5 },
+ { pinmux(14), 8, 6 },
+ { pinmux(14), 8, 7 },
+ { pinmux(15), 8, 0 },
+ { pinmux(15), 8, 1 },
+ { pinmux(15), 8, 2 },
+ { pinmux(15), 8, 3 },
+ { pinmux(15), 8, 4 },
+ { pinmux(15), 8, 5 },
+ { pinmux(15), 8, 6 }, /* GP1[0] */
+ { pinmux(15), 8, 7 },
+ { pinmux(16), 8, 0 },
+ { pinmux(16), 8, 1 },
+ { pinmux(16), 8, 2 },
+ { pinmux(16), 8, 3 },
+ { pinmux(16), 8, 4 },
+ { pinmux(16), 8, 5 },
+ { pinmux(16), 8, 6 },
+ { pinmux(16), 8, 7 },
+ { pinmux(17), 8, 0 },
+ { pinmux(17), 8, 1 },
+ { pinmux(17), 8, 2 },
+ { pinmux(17), 8, 3 },
+ { pinmux(17), 8, 4 },
+ { pinmux(17), 8, 5 },
+ { pinmux(17), 8, 6 }, /* GP2[0] */
+ { pinmux(17), 8, 7 },
+ { pinmux(18), 8, 0 },
+ { pinmux(18), 8, 1 },
+ { pinmux(18), 8, 2 },
+ { pinmux(18), 8, 3 },
+ { pinmux(18), 8, 4 },
+ { pinmux(18), 8, 5 },
+ { pinmux(18), 8, 6 },
+ { pinmux(18), 8, 7 },
+ { pinmux(19), 8, 0 },
+ { pinmux(9), 8, 2 },
+ { pinmux(9), 8, 3 },
+ { pinmux(9), 8, 4 },
+ { pinmux(9), 8, 5 },
+ { pinmux(9), 8, 6 },
+ { pinmux(10), 8, 1 }, /* GP3[0] */
+ { pinmux(10), 8, 2 },
+ { pinmux(10), 8, 3 },
+ { pinmux(10), 8, 4 },
+ { pinmux(10), 8, 5 },
+ { pinmux(10), 8, 6 },
+ { pinmux(10), 8, 7 },
+ { pinmux(11), 8, 0 },
+ { pinmux(11), 8, 1 },
+ { pinmux(11), 8, 2 },
+ { pinmux(11), 8, 3 },
+ { pinmux(11), 8, 4 },
+ { pinmux(9), 8, 7 },
+ { pinmux(2), 8, 6 },
+ { pinmux(11), 8, 5 },
+ { pinmux(11), 8, 6 },
+ { pinmux(12), 8, 4 }, /* GP4[0] */
+ { pinmux(12), 8, 5 },
+ { pinmux(12), 8, 6 },
+ { pinmux(12), 8, 7 },
+ { pinmux(13), 8, 0 },
+ { pinmux(13), 8, 1 },
+ { pinmux(13), 8, 2 },
+ { pinmux(13), 8, 3 },
+ { pinmux(13), 8, 4 },
+ { pinmux(13), 8, 5 },
+ { pinmux(11), 8, 7 },
+ { pinmux(12), 8, 0 },
+ { pinmux(12), 8, 1 },
+ { pinmux(12), 8, 2 },
+ { pinmux(12), 8, 3 },
+ { pinmux(9), 8, 1 },
+ { pinmux(7), 8, 3 }, /* GP5[0] */
+ { pinmux(7), 8, 4 },
+ { pinmux(7), 8, 5 },
+ { pinmux(7), 8, 6 },
+ { pinmux(7), 8, 7 },
+ { pinmux(8), 8, 0 },
+ { pinmux(8), 8, 1 },
+ { pinmux(8), 8, 2 },
+ { pinmux(8), 8, 3 },
+ { pinmux(8), 8, 4 },
+ { pinmux(8), 8, 5 },
+ { pinmux(8), 8, 6 },
+ { pinmux(8), 8, 7 },
+ { pinmux(9), 8, 0 },
+ { pinmux(7), 8, 1 },
+ { pinmux(7), 8, 2 },
+ { pinmux(5), 8, 1 }, /* GP6[0] */
+ { pinmux(5), 8, 2 },
+ { pinmux(5), 8, 3 },
+ { pinmux(5), 8, 4 },
+ { pinmux(5), 8, 5 },
+ { pinmux(5), 8, 6 },
+ { pinmux(5), 8, 7 },
+ { pinmux(6), 8, 0 },
+ { pinmux(6), 8, 1 },
+ { pinmux(6), 8, 2 },
+ { pinmux(6), 8, 3 },
+ { pinmux(6), 8, 4 },
+ { pinmux(6), 8, 5 },
+ { pinmux(6), 8, 6 },
+ { pinmux(6), 8, 7 },
+ { pinmux(7), 8, 0 },
+ { pinmux(1), 8, 0 }, /* GP7[0] */
+ { pinmux(1), 8, 1 },
+ { pinmux(1), 8, 2 },
+ { pinmux(1), 8, 3 },
+ { pinmux(1), 8, 4 },
+ { pinmux(1), 8, 5 },
+ { pinmux(1), 8, 6 },
+ { pinmux(1), 8, 7 },
+ { pinmux(2), 8, 0 },
+ { pinmux(2), 8, 1 },
+ { pinmux(2), 8, 2 },
+ { pinmux(2), 8, 3 },
+ { pinmux(2), 8, 4 },
+ { pinmux(2), 8, 5 },
+ { pinmux(0), 1, 0 },
+ { pinmux(0), 1, 1 },
+};
+#else
static const struct pinmux_config gpio_pinmux[] = {
{ pinmux(1), 8, 7 }, /* GP0[0] */
{ pinmux(1), 8, 6 },
@@ -179,6 +311,7 @@
{ pinmux(18), 8, 3 },
{ pinmux(18), 8, 2 },
};
+#endif
int gpio_request(unsigned gpio, const char *label)
{
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 33ee2c4..0dc2a50 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -61,12 +61,38 @@
"mmcdev=0\0" \
"mmcroot=/dev/mmcblk0p2 ro\0" \
"mmcrootfstype=ext4 rootwait\0" \
+ "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
+ "nandrootfstype=ubifs rootwait=1\0" \
+ "nandsrcaddr=0x280000\0" \
+ "nandimgsize=0x500000\0" \
+ "rootpath=/export/rootfs\0" \
+ "nfsopts=nolock\0" \
+ "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
+ "::off\0" \
"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
"ramrootfstype=ext2\0" \
"mmcargs=setenv bootargs console=${console} " \
"${optargs} " \
"root=${mmcroot} " \
"rootfstype=${mmcrootfstype}\0" \
+ "nandargs=setenv bootargs console=${console} " \
+ "${optargs} " \
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "spiroot=/dev/mtdblock4 rw\0" \
+ "spirootfstype=jffs2\0" \
+ "spisrcaddr=0xe0000\0" \
+ "spiimgsize=0x362000\0" \
+ "spibusno=0\0" \
+ "spiargs=setenv bootargs console=${console} " \
+ "${optargs} " \
+ "root=${spiroot} " \
+ "rootfstype=${spirootfstype}\0" \
+ "netargs=setenv bootargs console=${console} " \
+ "${optargs} " \
+ "root=/dev/nfs " \
+ "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
+ "ip=dhcp\0" \
"bootenv=uEnv.txt\0" \
"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
"importbootenv=echo Importing environment from mmc ...; " \
@@ -81,6 +107,21 @@
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"bootm ${loadaddr}\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \
+ "bootm ${loadaddr}\0" \
+ "spiboot=echo Booting from spi ...; " \
+ "run spiargs; " \
+ "sf probe ${spibusno}:0; " \
+ "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \
+ "bootm ${loadaddr}\0" \
+ "netboot=echo Booting from network ...; " \
+ "setenv autoload no; " \
+ "dhcp; " \
+ "tftp ${loadaddr} ${bootfile}; " \
+ "run netargs; " \
+ "bootm ${loadaddr}\0" \
"ramboot=echo Booting from ramdisk ...; " \
"run ramargs; " \
"bootm ${loadaddr}\0" \
@@ -106,6 +147,8 @@
"if run loaduimage; then " \
"run mmcboot;" \
"fi;" \
+ "else " \
+ "run nandboot;" \
"fi;" \
/* Clock Defines */
@@ -237,8 +280,8 @@
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS 0
#define CONFIG_SPL_SPI_CS 0
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
-#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000
+#define CONFIG_SPL_MUSB_NEW_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_BOARD_INIT
@@ -312,8 +355,41 @@
#ifdef CONFIG_MUSB_GADGET
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
+#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
#endif /* CONFIG_MUSB_GADGET */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
+/* disable host part of MUSB in SPL */
+#undef CONFIG_MUSB_HOST
+/*
+ * Disable UART, CPSW ethernet support and extra environment settings so we
+ * will fit within 101KiB.
+ */
+#undef CONFIG_SPL_ETH_SUPPORT
+#undef CONFIG_SPL_YMODEM_SUPPORT
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#endif
+
+/*
+ * Default to using SPI for environment, etc. We have multiple copies
+ * of SPL as the ROM will check these locations.
+ * 0x0 - 0x20000 : First copy of SPL
+ * 0x20000 - 0x40000 : Second copy of SPL
+ * 0x40000 - 0x60000 : Third copy of SPL
+ * 0x60000 - 0x80000 : Fourth copy of SPL
+ * 0x80000 - 0xDF000 : U-Boot
+ * 0xDF000 - 0xE0000 : U-Boot Environment
+ * 0xE0000 - 0x442000 : Linux Kernel
+ * 0x442000 - 0x800000 : Userland
+ */
+#if defined(CONFIG_SPI_BOOT)
+# undef CONFIG_ENV_IS_NOWHERE
+# define CONFIG_ENV_IS_IN_SPI_FLASH
+# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+# define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */
+# define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */
+#endif /* SPI support */
+
/* Unsupported features */
#undef CONFIG_USE_IRQ
@@ -346,10 +422,12 @@
/* CS0 */
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND
devices */
+#if !defined(CONFIG_SPI_BOOT)
#undef CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
#endif
+#endif
#endif /* ! __CONFIG_AM335X_EVM_H */
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index d3eb596..03dfe0a 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -42,6 +42,7 @@
#define CONFIG_MACH_DAVINCI_DA850_EVM
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
+#define CONFIG_SOC_DA850 /* TI DA850 SoC */
#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h
index 0e7f924..559e375 100644
--- a/include/configs/igep00x0.h
+++ b/include/configs/igep00x0.h
@@ -36,6 +36,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/omap3.h>
+#include <asm/mach-types.h>
/*
* Display CPU and Board information
@@ -86,7 +87,10 @@
#define CONFIG_DOS_PARTITION 1
/* define to enable boot progress via leds */
+#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
+ (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
#define CONFIG_SHOW_BOOT_PROGRESS
+#endif
/* USB */
#define CONFIG_MUSB_UDC 1
@@ -118,7 +122,8 @@
#ifdef CONFIG_BOOT_NAND
#define CONFIG_CMD_NAND
#endif
-#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
+#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
+ (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#endif
#define CONFIG_CMD_DHCP
diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h
index 07de565..376a3d0 100644
--- a/include/configs/omap3_mvblx.h
+++ b/include/configs/omap3_mvblx.h
@@ -90,9 +90,9 @@
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
-#define CONFIG_SERIAL3 3 /* UART3 */
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
+#define CONFIG_SERIAL1 1 /* UART1 */
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
@@ -102,6 +102,10 @@
#define CONFIG_OMAP_HSMMC 1
#define CONFIG_DOS_PARTITION 1
+/* silent console by default */
+#define CONFIG_SYS_DEVICE_NULLDEV 1
+#define CONFIG_SILENT_CONSOLE 1
+
/* USB */
#define CONFIG_MUSB_UDC 1
#define CONFIG_USB_OMAP3 1
@@ -152,19 +156,23 @@
/* Environment information */
#undef CONFIG_ENV_OVERWRITE /* disallow overwriting serial# and ethaddr */
-#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTDELAY 0
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_STOP_STR "S"
#define CONFIG_EXTRA_ENV_SETTINGS \
+ "silent=true\0" \
"loadaddr=0x82000000\0" \
"usbtty=cdc_acm\0" \
- "console=ttyO2,115200n8\0" \
+ "console=ttyO0,115200n8\0" \
"mpurate=600\0" \
"vram=12M\0" \
"dvimode=1024x768-24@60\0" \
"defaultdisplay=dvi\0" \
- "fpgafilename=mvbluelynx_x.rbf\0" \
- "loadfpga=if fatload mmc ${mmcdev} ${loadaddr} ${fpgafilename}; then " \
- "fpga load 0 ${loadaddr} ${filesize}; " \
+ "loadfpga=if ext2load mmc ${mmcdev}:2 ${loadaddr} "\
+ "/lib/firmware/mvblx/${fpgafilename}; then " \
+ "fpga load 0 ${loadaddr} ${filesize}; " \
"fi;\0" \
"mmcdev=0\0" \
"mmcroot=/dev/mmcblk0p2 rw\0" \
@@ -177,6 +185,7 @@
"omapdss.def_disp=${defaultdisplay} " \
"root=${mmcroot} " \
"rootfstype=${mmcrootfstype} " \
+ "mvfw.fpgavers=${fpgavers} " \
"${cmdline_suffix}\0" \
"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
"importbootenv=echo Importing environment from mmc ...; " \
diff --git a/spl/Makefile b/spl/Makefile
index 101d478..aac6146 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -81,6 +81,8 @@
LIBS-$(CONFIG_SPL_NET_SUPPORT) += net/libnet.o
LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/libnet.o
LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/phy/libphy.o
+LIBS-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += drivers/usb/musb-new/libusb_musb-new.o
+LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/libusb_gadget.o
ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o