riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree
Add initial device tree for StarFive VisionFive v2 board.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi
new file mode 100644
index 0000000..3c322c5
--- /dev/null
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ */
+
+#include "binman.dtsi"
+#include "jh7110-u-boot.dtsi"
+/ {
+ chosen {
+ bootph-pre-ram;
+ };
+
+ firmware {
+ spi0 = &qspi;
+ bootph-pre-ram;
+ };
+
+ config {
+ bootph-pre-ram;
+ u-boot,spl-payload-offset = <0x100000>;
+ };
+
+ memory@40000000 {
+ bootph-pre-ram;
+ };
+};
+
+&uart0 {
+ bootph-pre-ram;
+};
+
+&mmc0 {
+ bootph-pre-ram;
+};
+
+&mmc1 {
+ bootph-pre-ram;
+};
+
+&qspi {
+ bootph-pre-ram;
+
+ nor-flash@0 {
+ bootph-pre-ram;
+ };
+};
+
+&sysgpio {
+ bootph-pre-ram;
+};
+
+&mmc0_pins {
+ bootph-pre-ram;
+ mmc0-pins-rest {
+ bootph-pre-ram;
+ };
+};
+
+&mmc1_pins {
+ bootph-pre-ram;
+ mmc1-pins0 {
+ bootph-pre-ram;
+ };
+
+ mmc1-pins1 {
+ bootph-pre-ram;
+ };
+};
+