commit 5eaa97efc64a1196d545e6ca90372ee21da85dca
author Giulio Benetti <giulio.benetti@benettiengineering.com> Fri Jan 10 15:51:43 2020 +0100
committer Stefano Babic <sbabic@denx.de> Tue Jan 14 22:54:00 2020 +0100
tree 4f044b35f6f47b8408d26729f6baf8e220f2c6f4
parent 0ad8b9ce016c6af9d762a4d94875d1408883e626

serial_lpuart: add support for i.MXRT

Add i.MXRT compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.

Also according to RM, the Receive RX FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08 as done
for i.MX8. It needs also to set baudrate the same way as i.MX8 does.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>

drivers/serial/serial_lpuart.c

diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index b2ec561..ccb3ce6 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -49,7 +49,7 @@
 #define FIFO_RXSIZE_MASK	0x7
 #define FIFO_RXSIZE_OFF	0
 #define FIFO_TXFE		0x80
-#ifdef CONFIG_ARCH_IMX8
+#if defined(CONFIG_ARCH_IMX8) || defined(CONFIG_ARCH_IMXRT)
 #define FIFO_RXFE		0x08
 #else
 #define FIFO_RXFE		0x40
@@ -67,7 +67,8 @@
 	DEV_VF610 = 1,
 	DEV_LS1021A,
 	DEV_MX7ULP,
-	DEV_IMX8
+	DEV_IMX8,
+	DEV_IMXRT,
 };
 
 struct lpuart_serial_platdata {
@@ -409,7 +410,8 @@
 
 	lpuart_write32(plat->flags, &base->match, 0);
 
-	if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8) {
+	if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 ||
+	    plat->devtype == DEV_IMXRT) {
 		_lpuart32_serial_setbrg_7ulp(dev, gd->baudrate);
 	} else {
 		/* provide data bits, parity, stop bit, etc */
@@ -426,7 +428,8 @@
 	struct lpuart_serial_platdata *plat = dev_get_platdata(dev);
 
 	if (is_lpuart32(dev)) {
-		if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8)
+		if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 ||
+		    plat->devtype == DEV_IMXRT)
 			_lpuart32_serial_setbrg_7ulp(dev, baudrate);
 		else
 			_lpuart32_serial_setbrg(dev, baudrate);
@@ -530,6 +533,8 @@
 		plat->devtype = DEV_VF610;
 	else if (!fdt_node_check_compatible(blob, node, "fsl,imx8qm-lpuart"))
 		plat->devtype = DEV_IMX8;
+	else if (!fdt_node_check_compatible(blob, node, "fsl,imxrt-lpuart"))
+		plat->devtype = DEV_IMXRT;
 
 	return 0;
 }
@@ -549,6 +554,8 @@
 	{ .compatible = "fsl,vf610-lpuart"},
 	{ .compatible = "fsl,imx8qm-lpuart",
 		.data = LPUART_FLAG_REGMAP_32BIT_REG },
+	{ .compatible = "fsl,imxrt-lpuart",
+		.data = LPUART_FLAG_REGMAP_32BIT_REG },
 	{ }
 };
 

include/fsl_lpuart.h

diff --git a/include/fsl_lpuart.h b/include/fsl_lpuart.h
index fc517d4..511fb84 100644
--- a/include/fsl_lpuart.h
+++ b/include/fsl_lpuart.h
@@ -4,7 +4,8 @@
  *
  */
 
-#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8)
+#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8) || \
+	defined(CONFIG_ARCH_IMXRT)
 struct lpuart_fsl_reg32 {
 	u32 verid;
 	u32 param;