| commit | 5d6c626d9db81cbb9eba3d63ffd6fe612a48dcb6 | [log] [tgz] |
|---|---|---|
| author | York Sun <yorksun@freescale.com> | Fri Sep 05 13:52:41 2014 +0800 |
| committer | York Sun <yorksun@freescale.com> | Mon Sep 08 10:30:34 2014 -0700 |
| tree | ce6fe8fcaf3297e38b8330d8d5bdbb345c2f63f6 | |
| parent | c929213fd4f9a688e7c3d75efccdc77c350e1c26 [diff] |
driver/ddr/freescale: Add support of accumulate ECC If less than 8 ECC pins are used for DDR data bus width smaller than 64 bits, the 8-bit ECC code will be transmitted/received across several beats, and it will be used to check 64-bits of data once 8-bits of ECC are accumulated. Signed-off-by: York Sun <yorksun@freescale.com>