rockchip: rk3368: support UART2/4 in board_debug_uart_init()
evb-rk3368 is using UART2 and PX5 evb is using UART4
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 1ed06c5..f06d277 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -124,6 +124,46 @@
GPIO2D0_MASK, GPIO2D0_UART0_SIN);
rk_clrsetreg(&grf->gpio2d_iomux,
GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff1c0000)
+ struct rk3368_pmu_grf * const pmugrf __maybe_unused =
+ (struct rk3368_pmu_grf * const)0xff738000;
+
+ enum {
+ /* UART4 */
+ GPIO0D2_MASK = GENMASK(5, 4),
+ GPIO0D2_GPIO = 0,
+ GPIO0D2_UART4_SOUT = (3 << 4),
+
+ GPIO0D3_MASK = GENMASK(7, 6),
+ GPIO0D3_GPIO = 0,
+ GPIO0D3_UART4_SIN = (3 << 6),
+ };
+
+ /* Enable early UART4 on the PX5 */
+ rk_clrsetreg(&pmugrf->gpio0d_iomux,
+ GPIO0D2_MASK | GPIO0D3_MASK,
+ GPIO0D2_UART4_SOUT | GPIO0D3_UART4_SIN);
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff690000)
+ struct rk3368_grf * const grf =
+ (struct rk3368_grf * const)0xff770000;
+
+ enum {
+ GPIO2A6_SHIFT = 12,
+ GPIO2A6_MASK = GENMASK(13, 12),
+ GPIO2A6_GPIO = 0,
+ GPIO2A6_UART2_SIN = (2 << GPIO2A6_SHIFT),
+
+ GPIO2A5_SHIFT = 10,
+ GPIO2A5_MASK = GENMASK(11, 10),
+ GPIO2A5_GPIO = 0,
+ GPIO2A5_UART2_SOUT = (2 << GPIO2A5_SHIFT),
+ };
+
+ /* Enable early UART2 on the RK3368 */
+ rk_clrsetreg(&grf->gpio2a_iomux,
+ GPIO2A6_MASK, GPIO2A6_UART2_SIN);
+ rk_clrsetreg(&grf->gpio2a_iomux,
+ GPIO2A5_MASK, GPIO2A5_UART2_SOUT);
#endif
}
#endif