commit 5cc605f1d60ddfb92f8289ffe121e1d7438e9a11
author Grzegorz Bernacki <gjb@semihalf.com> Wed Jan 16 15:12:47 2008 +0100
committer Wolfgang Denk <wd@denx.de> Thu Jan 17 09:31:58 2008 +0100
tree 8e3ba14866674209e364e7617efc647da1d21168
parent ff2d134cde51dd109997085c66210f22e761c7dd

Set ips dividor to 1/4 of csb clock.

Previous setting cause ips clock to be out of spec. This bug was found by John
Rigby from Freescale.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>

include/mpc512x.h

diff --git a/include/mpc512x.h b/include/mpc512x.h
index a06b5c6..d1c6fb2 100644
--- a/include/mpc512x.h
+++ b/include/mpc512x.h
@@ -185,7 +185,7 @@
 
 /* SCFR1 System Clock Frequency Register 1
  */
-#define SCFR1_IPS_DIV			0x2
+#define SCFR1_IPS_DIV			0x4
 #define SCFR1_IPS_DIV_MASK		0x03800000
 #define SCFR1_IPS_DIV_SHIFT		23