commit 5cb8a0fc7f876d0ae15657805ce121aa5f21eeac
author Vignesh Raghavendra <vigneshr@ti.com> Mon Jul 06 13:36:53 2020 +0530
committer Lokesh Vutla <lokeshvutla@ti.com> Mon Jul 13 20:58:34 2020 +0530
tree b40462aafdc52de0d557247cb9d2f65a4d593f97
parent ceeb9f1eb60270c5fc8f65df21e54a2e2d3dd972

net: ti: am65-cpsw-nuss: Set ALE default thread enable

Force default thread to be used for RX as ALE is anyways set to Bypass
mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

drivers/net/ti/am65-cpsw-nuss.c

diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index e8fe875..753a117 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -61,6 +61,9 @@
 #define AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD	0x3
 #define AM65_CPSW_ALE_PN_CTL_REG_MAC_ONLY	BIT(11)
 
+#define AM65_CPSW_ALE_THREADMAPDEF_REG		0x134
+#define AM65_CPSW_ALE_DEFTHREAD_EN		BIT(15)
+
 #define AM65_CPSW_MACSL_CTL_REG			0x0
 #define AM65_CPSW_MACSL_CTL_REG_IFCTL_A		BIT(15)
 #define AM65_CPSW_MACSL_CTL_EXT_EN		BIT(18)
@@ -364,6 +367,9 @@
 	writel(AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD,
 	       common->ale_base + AM65_CPSW_ALE_PN_CTL_REG(0));
 
+	writel(AM65_CPSW_ALE_DEFTHREAD_EN,
+	       common->ale_base + AM65_CPSW_ALE_THREADMAPDEF_REG);
+
 	/* PORT x configuration */
 
 	/* Port x Max length register */