Merge tag 'efi-2022-10-rc6' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-10-rc6
Documentation:
* doc: improve description of autostart
UEFI:
* prefix test functions with efi_st_ in the LoadImage unit test
* avoid a warning message in efi_initrd_deregister()
diff --git a/board/armltd/vexpress64/lowlevel_init.S b/board/armltd/vexpress64/lowlevel_init.S
index 3dcfb85..68ca3f2 100644
--- a/board/armltd/vexpress64/lowlevel_init.S
+++ b/board/armltd/vexpress64/lowlevel_init.S
@@ -7,6 +7,6 @@
save_boot_params:
adr x8, prior_stage_fdt_address
- str x0, [x8]
+ stp x0, x1, [x8]
b save_boot_params_ret
diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c
index 05a7a25..af326dc 100644
--- a/board/armltd/vexpress64/vexpress64.c
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -100,7 +100,7 @@
* Push the variable into the .data section so that it
* does not get cleared later.
*/
-unsigned long __section(".data") prior_stage_fdt_address;
+unsigned long __section(".data") prior_stage_fdt_address[2];
#ifdef CONFIG_OF_BOARD
@@ -151,6 +151,23 @@
}
#endif
+/*
+ * Filter for a valid DTB, as TF-A happens to provide a pointer to some
+ * data structure using the DTB format, which we cannot use.
+ * The address of the DTB cannot be 0, in fact this is the reserved value
+ * for x1 in the kernel boot protocol.
+ * And while the nt_fw_config.dtb used by TF-A is a valid DTB structure, it
+ * does not contain the typical nodes and properties, which we test for by
+ * probing for the mandatory /memory node.
+ */
+static bool is_valid_dtb(uintptr_t dtb_ptr)
+{
+ if (dtb_ptr == 0 || fdt_magic(dtb_ptr) != FDT_MAGIC)
+ return false;
+
+ return fdt_subnode_offset((void *)dtb_ptr, 0, "memory") >= 0;
+}
+
void *board_fdt_blob_setup(int *err)
{
#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
@@ -172,10 +189,12 @@
}
#endif
- if (fdt_magic(prior_stage_fdt_address) == FDT_MAGIC &&
- fdt_totalsize(prior_stage_fdt_address) > 0x100) {
+ if (is_valid_dtb(prior_stage_fdt_address[1])) {
+ *err = 0;
+ return (void *)prior_stage_fdt_address[1];
+ } else if (is_valid_dtb(prior_stage_fdt_address[0])) {
*err = 0;
- return (void *)prior_stage_fdt_address;
+ return (void *)prior_stage_fdt_address[0];
}
if (fdt_magic(gd->fdt_blob) == FDT_MAGIC) {
diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c
index 9fa7b7b..c37629f 100644
--- a/board/ti/common/board_detect.c
+++ b/board/ti/common/board_detect.c
@@ -444,6 +444,16 @@
if (rc)
return rc;
+ /*
+ * Handle case of bad 2 byte eeproms that responds to 1 byte addressing
+ * but gets stuck in const addressing when read requests are performed
+ * on offsets. We re-read the board ID to ensure we have sane data back
+ */
+ rc = ti_i2c_eeprom_get(bus_addr, dev_addr, TI_EEPROM_HEADER_MAGIC,
+ sizeof(board_id), (uint8_t *)&board_id);
+ if (rc)
+ return rc;
+
if (board_id.header.id != TI_AM6_EEPROM_RECORD_BOARD_ID) {
pr_err("%s: Invalid board ID record!\n", __func__);
return -EINVAL;
diff --git a/cmd/pci.c b/cmd/pci.c
index 6258699..58a7475 100644
--- a/cmd/pci.c
+++ b/cmd/pci.c
@@ -452,7 +452,6 @@
{ PCI_REGION_PREFETCH, "prefetch" },
{ PCI_REGION_SYS_MEMORY, "sysmem" },
{ PCI_REGION_RO, "readonly" },
- { PCI_REGION_IO, "io" },
};
static void pci_show_regions(struct udevice *bus)
diff --git a/common/autoboot.c b/common/autoboot.c
index 63f2587..cdafe76 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -115,6 +115,7 @@
presskey_len++;
}
}
+ udelay(10000);
} while (never_timeout || get_ticks() <= etime);
return abort;
@@ -206,6 +207,7 @@
if (slow_equals(sha, sha_env, SHA256_SUM_LEN))
abort = 1;
}
+ udelay(10000);
} while (!abort && get_ticks() <= etime);
free(presskey);
@@ -293,6 +295,7 @@
abort = 1;
}
}
+ udelay(10000);
} while (!abort && get_ticks() <= etime);
return abort;
diff --git a/common/board_r.c b/common/board_r.c
index 56eb60f..00926dc 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -150,13 +150,13 @@
*/
gd->env_addr += gd->reloc_off;
#endif
-#ifdef CONFIG_OF_EMBED
/*
* The fdt_blob needs to be moved to new relocation address
* incase of FDT blob is embedded with in image
*/
- gd->fdt_blob += gd->reloc_off;
-#endif
+ if (CONFIG_IS_ENABLED(OF_EMBED) && CONFIG_IS_ENABLED(NEEDS_MANUAL_RELOC))
+ gd->fdt_blob += gd->reloc_off;
+
#ifdef CONFIG_EFI_LOADER
/*
* On the ARM architecture gd is mapped to a fixed register (r9 or x18).
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 240a044..4f88879 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -17,7 +17,6 @@
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index 8112b42..40df289 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -19,7 +19,6 @@
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x40000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index c8833e6..442f504 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -17,7 +17,6 @@
CONFIG_DEBUG_UART_BASE=0x11030000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x61800800
-CONFIG_TPL_MAX_SIZE=0x100000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x61100000
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 251cc3f..2782a39 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -16,7 +16,6 @@
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x40000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig
index 4bc2031..1717eb2 100644
--- a/configs/firefly-px30_defconfig
+++ b/configs/firefly-px30_defconfig
@@ -18,7 +18,6 @@
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 5f7c5a0..33cd0c3 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -18,7 +18,6 @@
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x40000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig
index 4dfb778..86f5e11 100644
--- a/configs/nanopi-r2s-rk3328_defconfig
+++ b/configs/nanopi-r2s-rk3328_defconfig
@@ -16,7 +16,6 @@
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x40000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig
index f8e4322..c0c0c4d 100644
--- a/configs/odroid-go2_defconfig
+++ b/configs/odroid-go2_defconfig
@@ -20,7 +20,6 @@
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig
index 625460b..2fb8bd8 100644
--- a/configs/px30-core-ctouch2-of10-px30_defconfig
+++ b/configs/px30-core-ctouch2-of10-px30_defconfig
@@ -18,7 +18,6 @@
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig
index bca4698..76f81ae 100644
--- a/configs/px30-core-ctouch2-px30_defconfig
+++ b/configs/px30-core-ctouch2-px30_defconfig
@@ -18,7 +18,6 @@
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig
index c13af93..8493500 100644
--- a/configs/px30-core-edimm2.2-px30_defconfig
+++ b/configs/px30-core-edimm2.2-px30_defconfig
@@ -18,7 +18,6 @@
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
index 8e2e530..8ba5034 100644
--- a/configs/roc-cc-rk3328_defconfig
+++ b/configs/roc-cc-rk3328_defconfig
@@ -16,7 +16,6 @@
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x40000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
index 9831670..fb5eac3 100644
--- a/configs/rock-pi-e-rk3328_defconfig
+++ b/configs/rock-pi-e-rk3328_defconfig
@@ -17,7 +17,6 @@
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x40000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index 9ca6f3a..b055dd0 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -16,7 +16,6 @@
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_TPL_MAX_SIZE=0x40000
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
diff --git a/drivers/gpio/turris_omnia_mcu.c b/drivers/gpio/turris_omnia_mcu.c
index 986ccde..2d2bf2d 100644
--- a/drivers/gpio/turris_omnia_mcu.c
+++ b/drivers/gpio/turris_omnia_mcu.c
@@ -16,6 +16,8 @@
/* available if FEAT_EXT_CMDS bit is set in features */
CMD_GET_EXT_STATUS_DWORD = 0x11,
+
+ /* available if FEAT_EXT_CMDS and FEAT_PERIPH_MCU bits are set in featurs */
CMD_EXT_CONTROL = 0x12,
CMD_GET_EXT_CONTROL_STATUS = 0x13,
};
@@ -54,6 +56,7 @@
/* CMD_GET_FEATURES */
enum features_e {
+ FEAT_PERIPH_MCU = BIT(0),
FEAT_EXT_CMDS = BIT(1),
};
@@ -84,10 +87,12 @@
return -EINVAL;
return GPIOF_INPUT;
- /* bank 2 - supported only when FEAT_EXT_CMDS is set */
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
case (16 + 32 + 0) ... (16 + 32 + 15):
if (!(info->features & FEAT_EXT_CMDS))
return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
return GPIOF_OUTPUT;
default:
@@ -120,10 +125,12 @@
return ((((u32)val32[3] << 24) | ((u32)val32[2] << 16) |
((u32)val32[1] << 8) | val32[0]) >> (offset - 16)) & 0x1;
- /* bank 2 - supported only when FEAT_EXT_CMDS is set */
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
case (16 + 32 + 0) ... (16 + 32 + 15):
if (!(info->features & FEAT_EXT_CMDS))
return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
ret = dm_i2c_read(dev, CMD_GET_EXT_CONTROL_STATUS, val16, 2);
if (ret)
return ret;
@@ -162,10 +169,12 @@
val16[0] = value ? val16[1] : 0;
return dm_i2c_write(dev, CMD_GENERAL_CONTROL, val16, sizeof(val16));
- /* bank 2 - supported only when FEAT_EXT_CMDS is set */
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
case (16 + 32 + 0) ... (16 + 32 + 15):
if (!(info->features & FEAT_EXT_CMDS))
return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
val32[3] = BIT(offset - 16 - 32) >> 8;
val32[2] = BIT(offset - 16 - 32) & 0xff;
val32[1] = value ? val32[3] : 0;
@@ -282,8 +291,10 @@
uc_priv->bank_name = "mcu_";
- if (info->features & FEAT_EXT_CMDS)
+ if ((info->features & FEAT_EXT_CMDS) && (info->features & FEAT_PERIPH_MCU))
uc_priv->gpio_count = 16 + 32 + 16;
+ else if (info->features & FEAT_EXT_CMDS)
+ uc_priv->gpio_count = 16 + 32;
else
uc_priv->gpio_count = 16;
diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index f17009a..1c34b75 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -890,7 +890,7 @@
static int dwc2_udc_get_status(struct dwc2_udc *dev,
struct usb_ctrlrequest *crq)
{
- u8 ep_num = crq->wIndex & 0x7F;
+ u8 ep_num = crq->wIndex & 0x3;
u16 g_status = 0;
u32 ep_ctrl;
@@ -1418,7 +1418,7 @@
break;
case USB_REQ_CLEAR_FEATURE:
- ep_num = usb_ctrl->wIndex & 0x7f;
+ ep_num = usb_ctrl->wIndex & 0x3;
if (!dwc2_udc_clear_feature(&dev->ep[ep_num].ep))
return;
@@ -1426,7 +1426,7 @@
break;
case USB_REQ_SET_FEATURE:
- ep_num = usb_ctrl->wIndex & 0x7f;
+ ep_num = usb_ctrl->wIndex & 0x3;
if (!dwc2_udc_set_feature(&dev->ep[ep_num].ep))
return;
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index a0f48f0..1aabe06 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -214,6 +214,14 @@
Enables support for the on-chip EHCI controller on i.MX23 and
i.MX28 SoCs.
+config USB_EHCI_NPCM
+ bool "Support for Nuvoton NPCM on-chip EHCI USB controller"
+ depends on ARCH_NPCM
+ default n
+ ---help---
+ Enables support for the on-chip EHCI controller on
+ Nuvoton NPCM chips.
+
config USB_EHCI_OMAP
bool "Support for OMAP3+ on-chip EHCI USB controller"
depends on ARCH_OMAP2PLUS
@@ -343,6 +351,14 @@
help
Enable support for the da850 USB controller.
+config USB_OHCI_NPCM
+ bool "Support for Nuvoton NPCM on-chip OHCI USB controller"
+ depends on ARCH_NPCM
+ default n
+ ---help---
+ Enables support for the on-chip OHCI controller on
+ Nuvoton NPCM chips.
+
endif # USB_OHCI_HCD
config SYS_USB_OHCI_SLOT_NAME
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 5fdb804..ddc3663 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -21,6 +21,7 @@
obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o
obj-$(CONFIG_USB_OHCI_PCI) += ohci-pci.o
obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o
+obj-$(CONFIG_USB_OHCI_NPCM) += ohci-npcm.o
# echi
obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
@@ -34,6 +35,7 @@
obj-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o
obj-$(CONFIG_USB_EHCI_MX6) += ehci-mx6.o
obj-$(CONFIG_USB_EHCI_MX7) += ehci-mx6.o
+obj-$(CONFIG_USB_EHCI_NPCM) += ehci-npcm.o
obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
diff --git a/drivers/usb/host/ehci-npcm.c b/drivers/usb/host/ehci-npcm.c
new file mode 100644
index 0000000..357a561
--- /dev/null
+++ b/drivers/usb/host/ehci-npcm.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021 Nuvoton Technology Corp.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <reset.h>
+#include <asm/io.h>
+#include <dm/device_compat.h>
+#include <linux/delay.h>
+#include "ehci.h"
+
+struct npcm_ehci_priv {
+ struct ehci_ctrl ctrl;
+ struct ehci_hccr *hcd;
+ struct phy phy;
+};
+
+static int npcm_ehci_setup_phy(struct udevice *dev, struct phy *phy)
+{
+ int ret;
+
+ if (!phy)
+ return 0;
+
+ ret = generic_phy_get_by_index(dev, 0, phy);
+ if (ret) {
+ if (ret != -ENOENT) {
+ dev_err(dev, "failed to get usb phy\n");
+ return ret;
+ }
+ } else {
+ ret = generic_phy_init(phy);
+ if (ret) {
+ dev_err(dev, "failed to init usb phy\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int npcm_ehci_init(struct udevice *dev)
+{
+ struct npcm_ehci_priv *priv = dev_get_priv(dev);
+ struct reset_ctl reset;
+ int ret;
+
+ ret = reset_get_by_index(dev, 0, &reset);
+ if (ret && ret != -ENOENT && ret != -ENOTSUPP) {
+ dev_err(dev, "failed to get reset\n");
+ return ret;
+ }
+
+ /* reset controller */
+ if (reset_valid(&reset))
+ reset_assert(&reset);
+
+ /* setup phy */
+ ret = npcm_ehci_setup_phy(dev, &priv->phy);
+ if (ret)
+ return ret;
+
+ /* release controller from reset */
+ if (reset_valid(&reset))
+ reset_deassert(&reset);
+
+ return 0;
+}
+
+static int npcm_ehci_probe(struct udevice *dev)
+{
+ struct npcm_ehci_priv *priv = dev_get_priv(dev);
+ struct ehci_hcor *hcor;
+ enum usb_init_type type = dev_get_driver_data(dev);
+ int ret;
+
+ ret = npcm_ehci_init(dev);
+ if (ret)
+ return ret;
+
+ priv->hcd = (struct ehci_hccr *)dev_read_addr_ptr(dev);
+ debug("USB HCD @0x%p\n", priv->hcd);
+ hcor = (struct ehci_hcor *)((uintptr_t)priv->hcd +
+ HC_LENGTH(ehci_readl(&priv->hcd->cr_capbase)));
+
+ return ehci_register(dev, priv->hcd, hcor, NULL, 0, type);
+}
+
+static int npcm_ehci_remove(struct udevice *dev)
+{
+ struct npcm_ehci_priv *priv = dev_get_priv(dev);
+
+ generic_phy_exit(&priv->phy);
+
+ return ehci_deregister(dev);
+}
+
+static const struct udevice_id npcm_ehci_ids[] = {
+ { .compatible = "nuvoton,npcm845-ehci", .data = USB_INIT_HOST },
+ { .compatible = "nuvoton,npcm845-udc", .data = USB_INIT_DEVICE },
+ { .compatible = "nuvoton,npcm750-ehci", .data = USB_INIT_HOST },
+ { .compatible = "nuvoton,npcm750-udc", .data = USB_INIT_DEVICE },
+ { }
+};
+
+U_BOOT_DRIVER(ehci_npcm) = {
+ .name = "ehci_npcm",
+ .id = UCLASS_USB,
+ .of_match = npcm_ehci_ids,
+ .probe = npcm_ehci_probe,
+ .remove = npcm_ehci_remove,
+ .ops = &ehci_usb_ops,
+ .priv_auto = sizeof(struct npcm_ehci_priv),
+ .plat_auto = sizeof(struct usb_plat),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
diff --git a/drivers/usb/host/ohci-npcm.c b/drivers/usb/host/ohci-npcm.c
new file mode 100644
index 0000000..9e1d529
--- /dev/null
+++ b/drivers/usb/host/ohci-npcm.c
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021 Nuvoton Technology Corp.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <reset.h>
+#include <asm/io.h>
+#include <dm/device_compat.h>
+#include <linux/delay.h>
+#include "ohci.h"
+
+struct npcm_ohci_priv {
+ ohci_t ohci;
+ struct phy phy;
+};
+
+static int npcm_ohci_setup_phy(struct udevice *dev, struct phy *phy)
+{
+ int ret;
+
+ if (!phy)
+ return 0;
+
+ ret = generic_phy_get_by_index(dev, 0, phy);
+ if (ret) {
+ if (ret != -ENOENT) {
+ dev_err(dev, "failed to get usb phy\n");
+ return ret;
+ }
+ } else {
+ ret = generic_phy_init(phy);
+ if (ret) {
+ dev_err(dev, "failed to init usb phy\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int npcm_ohci_init(struct udevice *dev)
+{
+ struct npcm_ohci_priv *priv = dev_get_priv(dev);
+ struct reset_ctl reset;
+ int ret;
+
+ ret = reset_get_by_index(dev, 0, &reset);
+ if (ret && ret != -ENOENT && ret != -ENOTSUPP) {
+ dev_err(dev, "failed to get reset\n");
+ return ret;
+ }
+
+ /* reset controller */
+ if (reset_valid(&reset))
+ reset_assert(&reset);
+
+ /* setup phy */
+ ret = npcm_ohci_setup_phy(dev, &priv->phy);
+ if (ret)
+ return ret;
+
+ /* release controller from reset */
+ if (reset_valid(&reset))
+ reset_deassert(&reset);
+
+ return 0;
+}
+
+static int npcm_ohci_probe(struct udevice *dev)
+{
+ struct ohci_regs *regs = dev_read_addr_ptr(dev);
+ int ret;
+
+ ret = npcm_ohci_init(dev);
+ if (ret)
+ return ret;
+
+ return ohci_register(dev, regs);
+}
+
+static int npcm_ohci_remove(struct udevice *dev)
+{
+ struct npcm_ohci_priv *priv = dev_get_priv(dev);
+
+ generic_phy_exit(&priv->phy);
+
+ return ohci_deregister(dev);
+}
+
+static const struct udevice_id npcm_ohci_ids[] = {
+ { .compatible = "nuvoton,npcm845-ohci" },
+ { .compatible = "nuvoton,npcm750-ohci" },
+ { }
+};
+
+U_BOOT_DRIVER(ohci_npcm) = {
+ .name = "ohci_npcm",
+ .id = UCLASS_USB,
+ .of_match = npcm_ohci_ids,
+ .probe = npcm_ohci_probe,
+ .remove = npcm_ohci_remove,
+ .ops = &ohci_usb_ops,
+ .priv_auto = sizeof(struct npcm_ohci_priv),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
diff --git a/drivers/watchdog/gpio_wdt.c b/drivers/watchdog/gpio_wdt.c
index fe06ec8..2920c2c 100644
--- a/drivers/watchdog/gpio_wdt.c
+++ b/drivers/watchdog/gpio_wdt.c
@@ -31,7 +31,7 @@
case HW_ALGO_LEVEL:
/* Pulse */
dm_gpio_set_value(&priv->gpio, 1);
- udelay(1);
+ __udelay(1);
dm_gpio_set_value(&priv->gpio, 0);
break;
}
diff --git a/drivers/watchdog/max6370_wdt.c b/drivers/watchdog/max6370_wdt.c
index e59cbb2..584a4ed 100644
--- a/drivers/watchdog/max6370_wdt.c
+++ b/drivers/watchdog/max6370_wdt.c
@@ -72,7 +72,7 @@
if (dm_gpio_is_valid(&wdt->gpio_wdi)) {
dm_gpio_set_value(&wdt->gpio_wdi, 1);
- udelay(1);
+ __udelay(1);
dm_gpio_set_value(&wdt->gpio_wdi, 0);
} else {
val = readb(wdt->reg);
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 8043abc..c80f8e8 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -782,8 +782,6 @@
fs_info->fs_root_tree = RB_ROOT;
cache_tree_init(&fs_info->mapping_tree.cache_tree);
- mutex_init(&fs_info->fs_mutex);
-
return fs_info;
free_all:
btrfs_free_fs_info(fs_info);
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 908a162..c251e2e 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -192,10 +192,13 @@
&tmp_devnum, &volnum);
if (ret == 2 && devnum == tmp_devnum) {
if (ubi_check_volume_sysfs_name(dirent->d_name,
- volname) == 0)
+ volname) == 0) {
+ closedir(sysfs_ubi);
return volnum;
+ }
}
}
+ closedir(sysfs_ubi);
return -1;
}