arm: dts: rockchip: Sync rv1126 dts from linux 6.8-rc1
Sync linux dts files for rv1126 boards from linux v6.8-rc1 tag. Includes
the newly added dts for Sonoff iHost.
Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/arch/arm/dts/rv1126-pinctrl.dtsi b/arch/arm/dts/rv1126-pinctrl.dtsi
index 28d8d29..f84f5f2 100644
--- a/arch/arm/dts/rv1126-pinctrl.dtsi
+++ b/arch/arm/dts/rv1126-pinctrl.dtsi
@@ -11,6 +11,14 @@
* by adding changes at end of this file.
*/
&pinctrl {
+ clk_out_ethernet {
+ /omit-if-no-ref/
+ clk_out_ethernetm1_pins: clk-out-ethernetm1-pins {
+ rockchip,pins =
+ /* clk_out_ethernet_m1 */
+ <2 RK_PC5 2 &pcfg_pull_none>;
+ };
+ };
emmc {
/omit-if-no-ref/
emmc_rstnout: emmc-rstnout {
@@ -51,6 +59,24 @@
<0 RK_PD5 2 &pcfg_pull_up_drv_level_2>;
};
};
+ fspi {
+ /omit-if-no-ref/
+ fspi_pins: fspi-pins {
+ rockchip,pins =
+ /* fspi_clk */
+ <1 RK_PA3 3 &pcfg_pull_down>,
+ /* fspi_cs0n */
+ <0 RK_PD4 3 &pcfg_pull_up>,
+ /* fspi_d0 */
+ <1 RK_PA0 3 &pcfg_pull_up>,
+ /* fspi_d1 */
+ <1 RK_PA1 3 &pcfg_pull_up>,
+ /* fspi_d2 */
+ <0 RK_PD6 3 &pcfg_pull_up>,
+ /* fspi_d3 */
+ <1 RK_PA2 3 &pcfg_pull_up>;
+ };
+ };
i2c0 {
/omit-if-no-ref/
i2c0_xfer: i2c0-xfer {
@@ -61,6 +87,86 @@
<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
};
};
+ i2c2 {
+ /omit-if-no-ref/
+ i2c2_xfer: i2c2-xfer {
+ rockchip,pins =
+ /* i2c2_scl */
+ <0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
+ /* i2c2_sda */
+ <0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
+ };
+ };
+ pwm2 {
+ /omit-if-no-ref/
+ pwm2m0_pins: pwm2m0-pins {
+ rockchip,pins =
+ /* pwm2_pin_m0 */
+ <0 RK_PC0 3 &pcfg_pull_none>;
+ };
+ };
+ pwm11 {
+ /omit-if-no-ref/
+ pwm11m0_pins: pwm11m0-pins {
+ rockchip,pins =
+ /* pwm11_pin_m0 */
+ <3 RK_PA7 6 &pcfg_pull_none>;
+ };
+ };
+ rgmii {
+ /omit-if-no-ref/
+ rgmiim1_miim: rgmiim1-miim {
+ rockchip,pins =
+ /* rgmii_mdc_m1 */
+ <2 RK_PC2 2 &pcfg_pull_none>,
+ /* rgmii_mdio_m1 */
+ <2 RK_PC1 2 &pcfg_pull_none>;
+ };
+ /omit-if-no-ref/
+ rgmiim1_rxer: rgmiim1-rxer {
+ rockchip,pins =
+ /* rgmii_rxer_m1 */
+ <2 RK_PC0 2 &pcfg_pull_none>;
+ };
+ /omit-if-no-ref/
+ rgmiim1_bus2: rgmiim1-bus2 {
+ rockchip,pins =
+ /* rgmii_rxd0_m1 */
+ <2 RK_PB5 2 &pcfg_pull_none>,
+ /* rgmii_rxd1_m1 */
+ <2 RK_PB6 2 &pcfg_pull_none>,
+ /* rgmii_rxdv_m1 */
+ <2 RK_PB4 2 &pcfg_pull_none>,
+ /* rgmii_txd0_m1 */
+ <2 RK_PC3 2 &pcfg_pull_none_drv_level_3>,
+ /* rgmii_txd1_m1 */
+ <2 RK_PC4 2 &pcfg_pull_none_drv_level_3>,
+ /* rgmii_txen_m1 */
+ <2 RK_PC6 2 &pcfg_pull_none_drv_level_3>;
+ };
+ /omit-if-no-ref/
+ rgmiim1_bus4: rgmiim1-bus4 {
+ rockchip,pins =
+ /* rgmii_rxclk_m1 */
+ <2 RK_PD3 2 &pcfg_pull_none>,
+ /* rgmii_rxd2_m1 */
+ <2 RK_PC7 2 &pcfg_pull_none>,
+ /* rgmii_rxd3_m1 */
+ <2 RK_PD0 2 &pcfg_pull_none>,
+ /* rgmii_txclk_m1 */
+ <2 RK_PD2 2 &pcfg_pull_none_drv_level_3>,
+ /* rgmii_txd2_m1 */
+ <2 RK_PD1 2 &pcfg_pull_none_drv_level_3>,
+ /* rgmii_txd3_m1 */
+ <2 RK_PA4 2 &pcfg_pull_none_drv_level_3>;
+ };
+ /omit-if-no-ref/
+ rgmiim1_mclkinout: rgmiim1-mclkinout {
+ rockchip,pins =
+ /* rgmii_clk_m1 */
+ <2 RK_PB7 2 &pcfg_pull_none>;
+ };
+ };
sdmmc0 {
/omit-if-no-ref/
sdmmc0_bus4: sdmmc0-bus4 {
@@ -187,6 +293,14 @@
/* uart3_tx_m0 */
<3 RK_PC6 4 &pcfg_pull_up>;
};
+ /omit-if-no-ref/
+ uart3m2_xfer: uart3m2-xfer {
+ rockchip,pins =
+ /* uart3_rx_m2 */
+ <3 RK_PA1 4 &pcfg_pull_up>,
+ /* uart3_tx_m2 */
+ <3 RK_PA0 4 &pcfg_pull_up>;
+ };
};
uart4 {
/omit-if-no-ref/
@@ -197,6 +311,14 @@
/* uart4_tx_m0 */
<3 RK_PA4 4 &pcfg_pull_up>;
};
+ /omit-if-no-ref/
+ uart4m2_xfer: uart4m2-xfer {
+ rockchip,pins =
+ /* uart4_rx_m2 */
+ <1 RK_PD4 3 &pcfg_pull_up>,
+ /* uart4_tx_m2 */
+ <1 RK_PD5 3 &pcfg_pull_up>;
+ };
};
uart5 {
/omit-if-no-ref/
@@ -207,5 +329,13 @@
/* uart5_tx_m0 */
<3 RK_PA6 4 &pcfg_pull_up>;
};
+ /omit-if-no-ref/
+ uart5m2_xfer: uart5m2-xfer {
+ rockchip,pins =
+ /* uart5_rx_m2 */
+ <2 RK_PA1 3 &pcfg_pull_up>,
+ /* uart5_tx_m2 */
+ <2 RK_PA0 3 &pcfg_pull_up>;
+ };
};
};