ARM: stm32: Power cycle Buck3 in reset on DHSOM
In case the DHSOM is in suspend state and either reset button is pushed
or IWDG2 triggers a watchdog reset, then DRAM initialization could fail
as follows:
"
RAM: DDR3L 32bits 2x4Gb 533MHz
DDR invalid size : 0x4, expected 0x40000000
DRAM init failed: -22
### ERROR ### Please RESET the board ###
"
Avoid this failure by not keeping any Buck regulators enabled during reset,
let the SoC and DRAMs power cycle fully. Since the change which keeps Buck3
VDD enabled during reset is ST specific, move this addition to ST specific
SPL board initialization so that it wouldn't affect the DHSOM .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c
index d52dce4..969ad48 100644
--- a/board/st/common/stpmic1.c
+++ b/board/st/common/stpmic1.c
@@ -185,21 +185,17 @@
}
/* early init of PMIC */
-void stpmic1_init(u32 voltage_mv)
+struct udevice *stpmic1_init(u32 voltage_mv)
{
struct udevice *dev;
if (uclass_get_device_by_driver(UCLASS_PMIC,
DM_DRIVER_GET(pmic_stpmic1), &dev))
- return;
+ return NULL;
/* update VDDCORE = BUCK1 */
if (voltage_mv)
stmpic_buck1_set(dev, voltage_mv);
- /* Keep vdd on during the reset cycle */
- pmic_clrsetbits(dev,
- STPMIC1_BUCKS_MRST_CR,
- STPMIC1_MRST_BUCK(STPMIC1_BUCK3),
- STPMIC1_MRST_BUCK(STPMIC1_BUCK3));
+ return dev;
}
diff --git a/board/st/common/stpmic1.h b/board/st/common/stpmic1.h
index b17d6f1..7a7169d 100644
--- a/board/st/common/stpmic1.h
+++ b/board/st/common/stpmic1.h
@@ -3,4 +3,4 @@
* Copyright (C) 2020, STMicroelectronics - All Rights Reserved
*/
-void stpmic1_init(u32 voltage_mv);
+struct udevice *stpmic1_init(u32 voltage_mv);
diff --git a/board/st/stm32mp1/spl.c b/board/st/stm32mp1/spl.c
index 747ec7e..8b4a529 100644
--- a/board/st/stm32mp1/spl.c
+++ b/board/st/stm32mp1/spl.c
@@ -5,6 +5,8 @@
#include <config.h>
#include <common.h>
+#include <power/pmic.h>
+#include <power/stpmic1.h>
#include <asm/arch/sys_proto.h>
#include "../common/stpmic1.h"
@@ -19,8 +21,15 @@
int board_early_init_f(void)
{
- if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER))
- stpmic1_init(opp_voltage_mv);
+ if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER)) {
+ struct udevice *dev = stpmic1_init(opp_voltage_mv);
+
+ /* Keep vdd on during the reset cycle */
+ pmic_clrsetbits(dev,
+ STPMIC1_BUCKS_MRST_CR,
+ STPMIC1_MRST_BUCK(STPMIC1_BUCK3),
+ STPMIC1_MRST_BUCK(STPMIC1_BUCK3));
+ }
return 0;
}