| commit | 5b5c21228d3d2bfcd1986fd92674b6054be18407 | [log] [tgz] |
|---|---|---|
| author | Chandan Nath <chandan.nath@ti.com> | Mon Jan 09 20:38:56 2012 +0000 |
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | Mon Jan 16 08:40:11 2012 +0100 |
| tree | 012405e9b81d9f9a17f0cefc19a4053f439d2ca5 | |
| parent | 68e382b85047dbe54859ea448710dc573330b0bf [diff] |
ARM:AM33XX: Fix ddr and timer register offset This patch is added to update incorrect ddr and timer register offset. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com>