| commit | 9491ec051f18ea2b38d3847b05b20c059c2d0bad | [log] [tgz] |
|---|---|---|
| author | Kuo-Jung Su <dantesu@faraday-tech.com> | Mon Jul 29 13:51:43 2013 +0800 |
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | Sat Sep 14 12:08:00 2013 +0200 |
| tree | b0b3137f121cb24281d450872803646e250a963c | |
| parent | 0f586cb2a09f5fb68210ddc5a12ca9c1df8ed375 [diff] |
arm: dma_alloc_coherent: malloc() -> memalign() Even though the MMU/D-cache is off, some DMA engines still expect strict address alignment. For example, the incoming Faraday FTMAC110 & FTGMAC100 ethernet controllers expect the tx/rx descriptors should always be aligned to 16-bytes boundary. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Albert ARIBAUD <albert.u.boot@aribaud.net>