5a85d05558dd6f7411632916155b123773ac31a9 - filogic/uboot

commit	5a85d05558dd6f7411632916155b123773ac31a9	[log] [tgz]
author	Yanhong Wang <yanhong.wang@starfivetech.com>	Wed Mar 29 11:42:13 2023 +0800
committer	Leo Yu-Chi Liang <ycliang@andestech.com>	Thu Apr 20 16:08:44 2023 +0800
tree	7b87a36c0bd2ff0534fecda7cafa51a2ed836db6
parent	993dc141b1cf54b04cebfaf2fed3f2810a6ac0f2 [diff]

clk: starfive: Add StarFive JH7110 clock driver

Add a DM clock driver for StarFive JH7110 SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>

drivers/clk/Kconfig[diff]
drivers/clk/Makefile[diff]
drivers/clk/starfive/Kconfig[Added - diff]
drivers/clk/starfive/Makefile[Added - diff]
drivers/clk/starfive/clk-jh7110-pll.c[Added - diff]
drivers/clk/starfive/clk-jh7110.c[Added - diff]
drivers/clk/starfive/clk.h[Added - diff]

7 files changed

tree: 7b87a36c0bd2ff0534fecda7cafa51a2ed836db6