arm: v7: Kconfig: Introduce SYS_ARM_CACHE_CP15
Certain ARM architectures like ARMv7-A, ARMv7-R has support for
enabling caches using CP15 registers. To have a common support
for all these architectures, introduce a Kconfig symbol
SYS_ARM_CACHE_CP15 that selects cache-cp15.c
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5ff6809..fd6d201 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -74,8 +74,15 @@
config THUMB2_KERNEL
bool
+config SYS_ARM_CACHE_CP15
+ bool "CP15 based cache enabling support"
+ help
+ Select this if your processor suports enabling caches by using
+ CP15 registers.
+
config SYS_ARM_MMU
bool "MMU-based Paged Memory Management Support"
+ select SYS_ARM_CACHE_CP15
help
Select if you want MMU-based virtualised addressing space
support by paged memory management.
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 77a3be4..655727f 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -61,11 +61,7 @@
endif
obj-y += cache.o
-ifndef CONFIG_ARM64
-ifndef CONFIG_CPU_V7M
-obj-y += cache-cp15.o
-endif
-endif
+obj-$(CONFIG_SYS_ARM_CACHE_CP15) += cache-cp15.o
obj-y += psci-dt.o