imx6: remove not longer supported aristainetos boards
Removed aristainetos2, 2b, 2b-csl. This boards have been
recalled and destroyed.
Adapt board code to remove stuff not needed anymore.
Fix checkpatch warning, remove fdt_high and initrd_high
from default environment.
Signed-off-by: Heiko Schocher <hs@denx.de>
zu remove
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e2e8a5f..457ccfe 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -643,13 +643,6 @@
ifneq ($(CONFIG_MX6DL)$(CONFIG_MX6QDL)$(CONFIG_MX6S),)
dtb-y += \
- imx6dl-aristainetos2_4.dtb \
- imx6dl-aristainetos2_7.dtb \
- imx6dl-aristainetos2b_4.dtb \
- imx6dl-aristainetos2b_7.dtb \
- imx6dl-aristainetos2b_csl_4.dtb \
- imx6dl-aristainetos2b_csl_7.dtb \
- imx6dl-aristainetos2c_4.dtb \
imx6dl-aristainetos2c_7.dtb \
imx6dl-brppt2.dtb \
imx6dl-cubox-i.dtb \
diff --git a/arch/arm/dts/imx6dl-aristainetos2_4-u-boot.dtsi b/arch/arm/dts/imx6dl-aristainetos2_4-u-boot.dtsi
deleted file mode 100644
index ac7052c..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2_4-u-boot.dtsi
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- */
-
-#include <imx6qdl-aristainetos2-u-boot.dtsi>
-
-&lcd_panel {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ipu_disp>;
- enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
- backlight = <&backlight>;
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_4.dts b/arch/arm/dts/imx6dl-aristainetos2_4.dts
deleted file mode 100644
index 0157e24..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2_4.dts
+++ /dev/null
@@ -1,51 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2 board
- * parts for 4.3 inch LG display on spi1 port0
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
- *
- */
-/dts-v1/;
-
-#include "imx6dl-aristainetos2_4.dtsi"
-#include "imx6qdl-aristainetos2.dtsi"
-
-/ {
- model = "aristainetos2 i.MX6 Dual Lite Board 4";
- compatible = "fsl,imx6dl";
-
-};
-
-&ecspi1 {
- lcd_panel: display@0 {
- compatible = "lg,lg4573";
- spi-max-frequency = <10000000>;
- reg = <0>;
- power-on-delay = <10>;
-
- display-timings {
- 480x800p57 {
- native-mode;
- clock-frequency = <27000027>;
- hactive = <480>;
- vactive = <800>;
- hfront-porch = <10>;
- hback-porch = <59>;
- hsync-len = <10>;
- vback-porch = <15>;
- vfront-porch = <15>;
- vsync-len = <15>;
- hsync-active = <1>;
- vsync-active = <1>;
- };
- };
-
- port {
- panel_in: endpoint {
- remote-endpoint = <&display_out>;
- };
- };
- };
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_4.dtsi b/arch/arm/dts/imx6dl-aristainetos2_4.dtsi
deleted file mode 100644
index be4601b..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2_4.dtsi
+++ /dev/null
@@ -1,84 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2 board
- * parts for 4.3 inch LG display on the parallel port and atmel maxtouch
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
- *
- */
-/dts-v1/;
-#include "imx6dl.dtsi"
-
-/ {
- display0: disp0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx-parallel-display";
- interface-pix-fmt = "rgb24";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ipu_disp>;
-
- port@0 {
- reg = <0>;
- display0_in: endpoint {
- remote-endpoint = <&ipu1_di0_disp0>;
- };
- };
-
- port@1 {
- reg = <1>;
- display_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
- };
-};
-
-&i2c3 {
- touch: touch@4b {
- compatible = "atmel,maxtouch";
- reg = <0x4b>;
- interrupt-parent = <&gpio2>;
- interrupts = <9 8>;
- };
-};
-
-&ipu1_di0_disp0 {
- remote-endpoint = <&display0_in>;
-};
-
-&iomuxc {
- pinctrl_ipu_disp: ipudisp1grp {
- fsl,pins = <
- MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x31
- MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xE1
- MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
- MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
- MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xE1
- MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xE1
- MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xE1
- MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xE1
- MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xE1
- MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xE1
- MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xE1
- MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xE1
- MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xE1
- MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xE1
- MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xE1
- MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xE1
- MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xE1
- MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xE1
- MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xe1
- MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xE1
- MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xE1
- MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xE1
- MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0xE1
- MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0xE1
- MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0xE1
- MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0xE1
- MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0xE1
- MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0xE1
- >;
- };
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_7-u-boot.dtsi b/arch/arm/dts/imx6dl-aristainetos2_7-u-boot.dtsi
deleted file mode 100644
index 25bc562..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2_7-u-boot.dtsi
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- */
-
-#include <imx6qdl-aristainetos2-u-boot.dtsi>
-/ {
- vdd_panel_reg: regulator-panel {
- compatible = "regulator-fixed";
- regulator-name = "panel_regulator";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-};
-
-&panel0 {
- power-supply = <&vdd_panel_reg>;
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_7.dts b/arch/arm/dts/imx6dl-aristainetos2_7.dts
deleted file mode 100644
index 0d1e83c..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2_7.dts
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2 board
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
- *
- */
-/dts-v1/;
-#include "imx6dl-aristainetos2_7.dtsi"
-#include "imx6qdl-aristainetos2.dtsi"
-
-/ {
- model = "aristainetos2 i.MX6 Dual Lite Board 7";
- compatible = "fsl,imx6dl";
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_7.dtsi b/arch/arm/dts/imx6dl-aristainetos2_7.dtsi
index 52d6a51..ec633b8 100644
--- a/arch/arm/dts/imx6dl-aristainetos2_7.dtsi
+++ b/arch/arm/dts/imx6dl-aristainetos2_7.dtsi
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: (GPL-2.0)
/*
* support for the imx6 based aristainetos2 board
- * parts for 7 inch LG display connected to the LVDS port and atmel maxtouch
+ * parts for 7 inch LG display connected to the LVDS port
*
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
@@ -26,15 +26,6 @@
};
};
-&i2c3 {
- touch: touch@4d {
- compatible = "atmel,maxtouch";
- reg = <0x4d>;
- interrupt-parent = <&gpio2>;
- interrupts = <9 8>;
- };
-};
-
&ldb {
status = "okay";
diff --git a/arch/arm/dts/imx6dl-aristainetos2b_4-u-boot.dtsi b/arch/arm/dts/imx6dl-aristainetos2b_4-u-boot.dtsi
deleted file mode 100644
index ee02df3..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2b_4-u-boot.dtsi
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ or X11
-/*
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- */
-
-#include <imx6qdl-aristainetos2b-u-boot.dtsi>
-
-&lcd_panel {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ipu_disp>;
- enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
- backlight = <&backlight>;
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2b_4.dts b/arch/arm/dts/imx6dl-aristainetos2b_4.dts
deleted file mode 100644
index a48a25c..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2b_4.dts
+++ /dev/null
@@ -1,50 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2b board
- * parts for 4.3 inch LG display on spi1 port1
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- *
- */
-/dts-v1/;
-
-#include "imx6dl-aristainetos2_4.dtsi"
-#include "imx6qdl-aristainetos2b.dtsi"
-
-/ {
- model = "aristainetos2b i.MX6 Dual Lite Board 4";
- compatible = "fsl,imx6dl";
-
-};
-
-&ecspi1 {
- lcd_panel: display@0 {
- compatible = "lg,lg4573";
- spi-max-frequency = <10000000>;
- reg = <1>;
- power-on-delay = <10>;
-
- display-timings {
- 480x800p57 {
- native-mode;
- clock-frequency = <27000027>;
- hactive = <480>;
- vactive = <800>;
- hfront-porch = <10>;
- hback-porch = <59>;
- hsync-len = <10>;
- vback-porch = <15>;
- vfront-porch = <15>;
- vsync-len = <15>;
- hsync-active = <1>;
- vsync-active = <1>;
- };
- };
-
- port {
- panel_in: endpoint {
- remote-endpoint = <&display_out>;
- };
- };
- };
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2b_7-u-boot.dtsi b/arch/arm/dts/imx6dl-aristainetos2b_7-u-boot.dtsi
deleted file mode 100644
index 0cb4f19..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2b_7-u-boot.dtsi
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ or X11
-/*
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- */
-
-#include <imx6qdl-aristainetos2b-u-boot.dtsi>
-/ {
- vdd_panel_reg: regulator-panel {
- compatible = "regulator-fixed";
- regulator-name = "panel_regulator";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-};
-
-&panel0 {
- power-supply = <&vdd_panel_reg>;
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2b_7.dts b/arch/arm/dts/imx6dl-aristainetos2b_7.dts
deleted file mode 100644
index f1496cb..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2b_7.dts
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2 board
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
- *
- */
-/dts-v1/;
-#include "imx6dl-aristainetos2_7.dtsi"
-#include "imx6qdl-aristainetos2b.dtsi"
-
-/ {
- model = "aristainetos2b i.MX6 Dual Lite Board 7";
- compatible = "fsl,imx6dl";
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2b_csl_4-u-boot.dtsi b/arch/arm/dts/imx6dl-aristainetos2b_csl_4-u-boot.dtsi
deleted file mode 100644
index 654ac12..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2b_csl_4-u-boot.dtsi
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ or X11
-/*
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- */
-
-#include <imx6qdl-aristainetos2b_csl-u-boot.dtsi>
-
-&lcd_panel {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ipu_disp>;
- enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
- backlight = <&backlight>;
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2b_csl_4.dts b/arch/arm/dts/imx6dl-aristainetos2b_csl_4.dts
deleted file mode 100644
index bfbb799..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2b_csl_4.dts
+++ /dev/null
@@ -1,50 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2b csl board
- * parts for 4.3 inch LG display on spi1 port1
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- *
- */
-/dts-v1/;
-
-#include "imx6dl-aristainetos2_4.dtsi"
-#include "imx6qdl-aristainetos2b_csl.dtsi"
-
-/ {
- model = "aristainetos2b csl i.MX6 Dual Lite Board 4";
- compatible = "fsl,imx6dl";
-
-};
-
-&ecspi1 {
- lcd_panel: display@0 {
- compatible = "lg,lg4573";
- spi-max-frequency = <10000000>;
- reg = <1>;
- power-on-delay = <10>;
-
- display-timings {
- 480x800p57 {
- native-mode;
- clock-frequency = <27000027>;
- hactive = <480>;
- vactive = <800>;
- hfront-porch = <10>;
- hback-porch = <59>;
- hsync-len = <10>;
- vback-porch = <15>;
- vfront-porch = <15>;
- vsync-len = <15>;
- hsync-active = <1>;
- vsync-active = <1>;
- };
- };
-
- port {
- panel_in: endpoint {
- remote-endpoint = <&display_out>;
- };
- };
- };
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2b_csl_7-u-boot.dtsi b/arch/arm/dts/imx6dl-aristainetos2b_csl_7-u-boot.dtsi
deleted file mode 100644
index 70d195e..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2b_csl_7-u-boot.dtsi
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ or X11
-/*
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- */
-
-#include <imx6qdl-aristainetos2b_csl-u-boot.dtsi>
-/ {
- vdd_panel_reg: regulator-panel {
- compatible = "regulator-fixed";
- regulator-name = "panel_regulator";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-};
-
-&panel0 {
- power-supply = <&vdd_panel_reg>;
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2b_csl_7.dts b/arch/arm/dts/imx6dl-aristainetos2b_csl_7.dts
deleted file mode 100644
index ecf767d..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2b_csl_7.dts
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2 board
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
- *
- */
-/dts-v1/;
-#include "imx6dl-aristainetos2_7.dtsi"
-#include "imx6qdl-aristainetos2b_csl.dtsi"
-
-/ {
- model = "aristainetos2b csl i.MX6 Dual Lite Board 7";
- compatible = "fsl,imx6dl";
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2c_4-u-boot.dtsi b/arch/arm/dts/imx6dl-aristainetos2c_4-u-boot.dtsi
deleted file mode 100644
index 052d518..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2c_4-u-boot.dtsi
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ or X11
-/*
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- */
-
-#include <imx6qdl-aristainetos2c-u-boot.dtsi>
-
-&lcd_panel {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ipu_disp>;
- enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
- backlight = <&backlight>;
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2c_4.dts b/arch/arm/dts/imx6dl-aristainetos2c_4.dts
deleted file mode 100644
index 142b108..0000000
--- a/arch/arm/dts/imx6dl-aristainetos2c_4.dts
+++ /dev/null
@@ -1,50 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2c board
- * parts for 4.3 inch LG display on spi1 port1
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- *
- */
-/dts-v1/;
-
-#include "imx6dl-aristainetos2_4.dtsi"
-#include "imx6qdl-aristainetos2c.dtsi"
-
-/ {
- model = "aristainetos2c i.MX6 Dual Lite Board 4";
- compatible = "fsl,imx6dl";
-
-};
-
-&ecspi1 {
- lcd_panel: display@0 {
- compatible = "lg,lg4573";
- spi-max-frequency = <10000000>;
- reg = <1>;
- power-on-delay = <10>;
-
- display-timings {
- 480x800p57 {
- native-mode;
- clock-frequency = <27000027>;
- hactive = <480>;
- vactive = <800>;
- hfront-porch = <10>;
- hback-porch = <59>;
- hsync-len = <10>;
- vback-porch = <15>;
- vfront-porch = <15>;
- vsync-len = <15>;
- hsync-active = <1>;
- vsync-active = <1>;
- };
- };
-
- port {
- panel_in: endpoint {
- remote-endpoint = <&display_out>;
- };
- };
- };
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2c_7.dts b/arch/arm/dts/imx6dl-aristainetos2c_7.dts
index 35435e1..00eec82 100644
--- a/arch/arm/dts/imx6dl-aristainetos2c_7.dts
+++ b/arch/arm/dts/imx6dl-aristainetos2c_7.dts
@@ -11,6 +11,6 @@
#include "imx6qdl-aristainetos2c.dtsi"
/ {
- model = "aristainetos2c i.MX6 Dual Lite Board 7";
+ model = "aristainetos2c+2d i.MX6 Dual Lite Boards 7";
compatible = "fsl,imx6dl";
};
diff --git a/arch/arm/dts/imx6qdl-aristainetos2-common.dtsi b/arch/arm/dts/imx6qdl-aristainetos2-common.dtsi
index 2aa531b..5701436 100644
--- a/arch/arm/dts/imx6qdl-aristainetos2-common.dtsi
+++ b/arch/arm/dts/imx6qdl-aristainetos2-common.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0)
/*
- * support for the imx6 based aristainetos2 board
+ * support for the imx6 based aristainetos2 boards
* parts common to all versions
*
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
@@ -13,6 +13,8 @@
/ {
aliases {
eeprom0 = &i2c_eeprom0;
+ eeprom1 = &i2c_eeprom1;
+ eeprom2 = &i2c_eeprom2;
pmic0 = &i2c_pmic0;
};
@@ -250,6 +252,12 @@
};
};
+ i2c_eeprom2: eeprom@57{
+ compatible = "atmel,24c64";
+ reg = <0x57>;
+ pagesize = <32>;
+ };
+
rtc@68 {
compatible = "st,m41t11";
reg = <0x68>;
@@ -274,6 +282,19 @@
};
};
+&gpio2 {
+ tpm_pp {
+ gpio-hog;
+ output-low;
+ gpios = <17 GPIO_ACTIVE_HIGH>;
+ };
+ tpm_reset {
+ gpio-hog;
+ output-high;
+ gpios = <18 GPIO_ACTIVE_HIGH>;
+ };
+};
+
&gpio6 {
spi_bus_ena {
gpio-hog;
diff --git a/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi b/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi
index c713efd..3063f01 100644
--- a/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi
@@ -50,28 +50,6 @@
};
};
-&iomuxc {
- pinctrl-0 = <&pinctrl_gpio &pinctrl_gpio_fix>;
- u-boot,dm-pre-reloc;
-
- pinctrl_gpio_fix: gpiofixgrp {
- /*
- * usdhc2 has a levelshifter on the carrier board Rev. DV1,
- * that will automatically detect the driving direction.
- * During initialisation this isn't working correctly,
- * which causes DAT3 to be driven low towards the SD-card.
- * This causes a SD-card enetring the SPI-Mode
- * and therefore getting inaccessible until next power cycle.
- * As workaround we drive the DAT3 line as GPIO and set it high.
- * This makes usdhc2 unusable in u-boot, but works for the
- * initialisation in Linux
- */
- fsl,pins = <
- MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x20000
- >;
- };
-};
-
&gpio1 {
usdhc_fix {
gpio-hog;
diff --git a/arch/arm/dts/imx6qdl-aristainetos2.dtsi b/arch/arm/dts/imx6qdl-aristainetos2.dtsi
deleted file mode 100644
index 788e13e..0000000
--- a/arch/arm/dts/imx6qdl-aristainetos2.dtsi
+++ /dev/null
@@ -1,244 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2 board
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
- *
- */
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clock/imx6qdl-clock.h>
-
-#include "imx6qdl-aristainetos2-common.dtsi"
-
-/ {
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio>;
-
- LED_blue {
- label = "led_blue";
- gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
- };
-
- LED_green {
- label = "led_green";
- gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
- };
-
- LED_red {
- label = "led_red";
- gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
- };
-
- LED_yellow {
- label = "led_yellow";
- gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;
- };
-
- LED_ena {
- label = "led_ena";
- gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&ecspi1 {
- fsl,spi-num-chipselects = <3>;
- cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH
- &gpio4 10 GPIO_ACTIVE_HIGH
- &gpio4 11 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1>;
- status = "okay";
-};
-
-&ecspi4 {
- fsl,spi-num-chipselects = <2>;
- cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi4>;
- status = "okay";
- pinctrl-assert-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
-
- flash: m25p80@1 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "micron,n25q128a11", "jedec,spi-nor";
- spi-max-frequency = <20000000>;
- reg = <1>;
- };
-};
-
-&gpio7 {
- sd2_driver_ena {
- gpio-hog;
- output-high;
- gpios = <8 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&gpmi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpmi_nand>;
- status = "okay";
-};
-
-&can1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan1>;
- status = "okay";
-};
-
-&can2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan2>;
- status = "okay";
-};
-
-&usdhc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1>;
- cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
- no-1-8-v;
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc2>;
- cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
- wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
- no-1-8-v;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_ecspi1: ecspi1grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
- MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x100b1 /* SS0# */
- MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1 /* SS1# */
- MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1 /* SS2# */
- >;
- };
-
- pinctrl_ecspi4: ecspi4grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
- MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
- MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
- MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x100b1 /* SS0# */
- MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */
- MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x4001b0b0 /* WP pin */
- >;
- };
-
- pinctrl_gpio: gpiogrp {
- fsl,pins = <
- /* led enable */
- MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0
- /* LCD power enable */
- MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x4001b0b0
- /* led yellow */
- MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x4001b0b0
- /* led red */
- MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x4001b0b0
- /* led green */
- MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x4001b0b0
- /* led blue */
- MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x4001b0b0
- /* Profibus IRQ */
- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
- /* FPGA IRQ currently unused*/
- MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0
- /* Display reset because of clock failure */
- MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b0
- /* spi bus #2 SS driver enable */
- MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x4001b0b0
- /* RST_LOC# PHY reset input (has pull-down!)*/
- MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x4001b0b0
- /* USB_OTG_ID = GPIO1_24*/
- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x4001b0b0
- /* Touchscreen IRQ */
- MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
- /* PCIe reset */
- MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x4001b0b0
- >;
- };
-
- pinctrl_gpmi_nand: gpmi-nand {
- fsl,pins = <
- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
- >;
- };
-
- pinctrl_flexcan1: flexcan1grp {
- fsl,pins = <
- MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x1b0b0
- MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x1b0b0
- >;
- };
-
- pinctrl_flexcan2: flexcan2grp {
- fsl,pins = <
- MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
- MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
- >;
- };
-
- pinctrl_usbotg: usbotggrp {
- fsl,pins = <
- MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
- /* SD1 card detect input */
- MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
- /* SD1 write protect input */
- MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX6QDL_PAD_SD2_CMD__SD2_CMD 0x71
- MX6QDL_PAD_SD2_CLK__SD2_CLK 0x71
- MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x71
- MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x71
- MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71
- MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71
- /* SD2 level shifter output enable */
- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x4001b0b0
- /* SD2 card detect input */
- MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
- /* SD2 write protect input */
- MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
- >;
- };
-};
diff --git a/arch/arm/dts/imx6qdl-aristainetos2b-u-boot.dtsi b/arch/arm/dts/imx6qdl-aristainetos2b-u-boot.dtsi
deleted file mode 100644
index 88826a2..0000000
--- a/arch/arm/dts/imx6qdl-aristainetos2b-u-boot.dtsi
+++ /dev/null
@@ -1,77 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ or X11
-/*
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- */
-
-/ {
- chosen {
- u-boot,dm-pre-reloc;
- stdout-path = &uart2;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <&wdog1>;
- };
-};
-
-&uart2 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_gpio {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart2 {
- u-boot,dm-pre-reloc;
-};
-
-&iomuxc {
- u-boot,dm-pre-reloc;
-};
-
-&aips2 {
- u-boot,dm-pre-reloc;
-};
-
-&backlight {
- pwms = <&pwm1 0 300000>;
- default-brightness-level = <2>;
-};
-
-/*
- * allow switching write protect / reset pin by gpio,
- * because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot
- */
-&gpio2 {
- u-boot,dm-pre-reloc;
-
- wp_spi_nor {
- gpio-hog;
- output-high;
- gpios = <15 GPIO_ACTIVE_HIGH>;
- };
-
- reset_spi_nor {
- gpio-hog;
- output-high;
- gpios = <28 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&gpio4 {
- u-boot,dm-pre-reloc;
-};
-
-&ecspi1 {
- u-boot,dm-pre-reloc;
-};
-
-&flash {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_ecspi1 {
- u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/imx6qdl-aristainetos2b.dtsi b/arch/arm/dts/imx6qdl-aristainetos2b.dtsi
deleted file mode 100644
index 7d92ea2..0000000
--- a/arch/arm/dts/imx6qdl-aristainetos2b.dtsi
+++ /dev/null
@@ -1,266 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2b board
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
- *
- */
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clock/imx6qdl-clock.h>
-
-#include "imx6qdl-aristainetos2-common.dtsi"
-
-/ {
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio>;
-
- LED_blue {
- label = "led_blue";
- gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
- };
-
- LED_green {
- label = "led_green";
- gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
- };
-
- LED_red {
- label = "led_red";
- gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;
- };
-
- LED_yellow {
- label = "led_yellow";
- gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
- };
-
- LED_ena {
- label = "led_ena";
- gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&ecspi1 {
- fsl,spi-num-chipselects = <3>;
- cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH
- &gpio4 10 GPIO_ACTIVE_HIGH
- &gpio4 11 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1>;
- status = "okay";
- pinctrl-assert-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
- pinctrl-assert-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
-
- flash: m25p80@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "micron,n25q128a11", "jedec,spi-nor";
- spi-max-frequency = <20000000>;
- reg = <0>;
- };
-};
-
-&ecspi4 {
- fsl,spi-num-chipselects = <2>;
- cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi4>;
- status = "okay";
-};
-
-&i2c1 {
- tpm@20 {
- compatible = "infineon,slb9645tt";
- reg = <0x20>;
- };
-};
-
-&gpio7 {
- sd2_driver_ena {
- gpio-hog;
- output-high;
- gpios = <8 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&gpmi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpmi_nand>;
- status = "okay";
-};
-
-&can1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan1>;
- status = "okay";
-};
-
-&can2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan2>;
- status = "okay";
-};
-
-&usdhc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1>;
- cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
- wp-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
- no-1-8-v;
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc2>;
- /*
- * comment out this line to make the WiFi Eval-Module work in
- * SD-Slot2, and add line:
- * broken-cd;
- * causes 6% CPU load if no WiFi module installed (polling)
- */
- cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
- wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
- no-1-8-v;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_ecspi1: ecspi1grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
- /* SS0# */
- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
- /* SS1# */
- MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1
- /* SS2# */
- MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1
- /* WP pin NOR Flash */
- MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x4001b0b0
- /* Flash nReset */
- MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x4001b0b0
- >;
- };
-
- pinctrl_ecspi4: ecspi4grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
- MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
- MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
- MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x100b1 /* SS0# */
- MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */
- >;
- };
-
- pinctrl_gpio: gpiogrp {
- fsl,pins = <
- /* led enable */
- MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0
- /* LCD power enable */
- MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x4001b0b0
- /* led yellow */
- MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x4001b0b0
- /* led red */
- MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x4001b0b0
- /* led green */
- MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x4001b0b0
- /* led blue */
- MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x4001b0b0
- /* Profibus IRQ */
- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
- /* FPGA IRQ currently unused*/
- MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0
- /* Display reset because of clock failure */
- MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b0
- /* spi bus #2 SS driver enable */
- MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x4001b0b0
- /* RST_LOC# PHY reset input (has pull-down!)*/
- MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x4001b0b0
- /* Touchscreen IRQ */
- MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
- /* PCIe reset */
- MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x4001b0b0
- /* make sure pin is GPIO and not ENET_REF_CLK */
- MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x4001a0b0
- /* SD2 level shifter output enable / SD2 Reset# */
- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x4001b0b0
- >;
- };
-
- pinctrl_gpmi_nand: gpmi-nand {
- fsl,pins = <
- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
- >;
- };
-
- pinctrl_flexcan1: flexcan1grp {
- fsl,pins = <
- MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x1b0b0
- MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x1b0b0
- >;
- };
-
- pinctrl_flexcan2: flexcan2grp {
- fsl,pins = <
- MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
- MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
- >;
- };
-
- pinctrl_usbotg: usbotggrp {
- fsl,pins = <
- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
- MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
- /* SD1 card detect input */
- MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
- /* SD1 write protect input */
- MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX6QDL_PAD_SD2_CMD__SD2_CMD 0x71
- MX6QDL_PAD_SD2_CLK__SD2_CLK 0x71
- MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x71
- MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x71
- MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71
- MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71
- /* SD2 card detect input */
- MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
- /* SD2 write protect input */
- MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
- >;
- };
-};
diff --git a/arch/arm/dts/imx6qdl-aristainetos2b_csl-u-boot.dtsi b/arch/arm/dts/imx6qdl-aristainetos2b_csl-u-boot.dtsi
deleted file mode 100644
index 8c2ed70..0000000
--- a/arch/arm/dts/imx6qdl-aristainetos2b_csl-u-boot.dtsi
+++ /dev/null
@@ -1,77 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ or X11
-/*
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- */
-
-/ {
- chosen {
- u-boot,dm-pre-reloc;
- stdout-path = &uart1;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <&wdog1>;
- };
-};
-
-&uart1 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_gpio {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart1 {
- u-boot,dm-pre-reloc;
-};
-
-&iomuxc {
- u-boot,dm-pre-reloc;
-};
-
-&aips1 {
- u-boot,dm-pre-reloc;
-};
-
-&backlight {
- pwms = <&pwm1 0 300000>;
- default-brightness-level = <2>;
-};
-
-/*
- * allow switching write protect / reset pin by gpio,
- * because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot
- */
-&gpio2 {
- u-boot,dm-pre-reloc;
-
- wp_spi_nor {
- gpio-hog;
- output-high;
- gpios = <15 GPIO_ACTIVE_HIGH>;
- };
-
- reset_spi_nor {
- gpio-hog;
- output-high;
- gpios = <28 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&gpio4 {
- u-boot,dm-pre-reloc;
-};
-
-&ecspi1 {
- u-boot,dm-pre-reloc;
-};
-
-&flash {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_ecspi1 {
- u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/imx6qdl-aristainetos2b_csl.dtsi b/arch/arm/dts/imx6qdl-aristainetos2b_csl.dtsi
deleted file mode 100644
index fa4dade..0000000
--- a/arch/arm/dts/imx6qdl-aristainetos2b_csl.dtsi
+++ /dev/null
@@ -1,248 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0)
-/*
- * support for the imx6 based aristainetos2b-csl board
- *
- * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
- * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
- *
- */
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clock/imx6qdl-clock.h>
-
-#include "imx6qdl-aristainetos2-common.dtsi"
-
-/ {
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio>;
-
- LED_blue {
- label = "led_blue";
- gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
- };
-
- LED_green {
- label = "led_green";
- gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
- };
-
- LED_red {
- label = "led_red";
- gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;
- };
-
- LED_yellow {
- label = "led_yellow";
- gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
- };
-
- LED_blue_2 {
- label = "led_blue2";
- gpios = <&expander 15 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
-
- LED_green_2 {
- label = "led_green2";
- gpios = <&expander 14 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
-
- LED_red_2 {
- label = "led_red2";
- gpios = <&expander 12 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
-
- LED_yellow_2 {
- label = "led_yellow2";
- gpios = <&expander 13 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
-
- LED_ena {
- label = "led_ena";
- gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&ecspi1 {
- fsl,spi-num-chipselects = <3>;
- cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH
- &gpio4 10 GPIO_ACTIVE_HIGH
- &gpio4 11 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1>;
- status = "okay";
- pinctrl-assert-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
- pinctrl-assert-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
-
- flash: m25p80@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "micron,n25q128a11", "jedec,spi-nor";
- spi-max-frequency = <20000000>;
- reg = <0>;
- };
-};
-
-&ecspi4 {
- fsl,spi-num-chipselects = <2>;
- cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi4>;
- status = "okay";
-};
-
-&i2c1 {
- tpm@20 {
- compatible = "infineon,slb9645tt";
- reg = <0x20>;
- };
-};
-
-&gpio7 {
- wlan_reset {
- gpio-hog;
- output-high;
- gpios = <8 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&gpmi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpmi_nand>;
- status = "okay";
-};
-
-&usdhc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1>;
- cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc2>;
- no-1-8-v;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_ecspi1: ecspi1grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
- /* SS0# */
- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
- /* SS1# */
- MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1
- /* SS2# */
- MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1
- /* WP pin NOR Flash */
- MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x4001b0b0
- /* Flash nReset */
- MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x4001b0b0
- >;
- };
-
- pinctrl_ecspi4: ecspi4grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
- MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
- MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
- MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x100b1 /* SS0# */
- MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */
- >;
- };
-
- pinctrl_gpio: gpiogrp {
- fsl,pins = <
- /* led enable */
- MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0
- /* LCD power enable */
- MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x4001b0b0
- /* led yellow */
- MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x4001b0b0
- /* led red */
- MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x4001b0b0
- /* led green */
- MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x4001b0b0
- /* led blue */
- MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x4001b0b0
- /* Profibus IRQ */
- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
- /* FPGA IRQ currently unused*/
- MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0
- /* Display reset because of clock failure */
- MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b0
- /* spi bus #2 SS driver enable */
- MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x4001b0b0
- /* RST_LOC# PHY reset input (has pull-down!)*/
- MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x4001b0b0
- /* Touchscreen IRQ */
- MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
- /* PCIe reset */
- MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x4001b0b0
- /* make sure pin is GPIO and not ENET_REF_CLK */
- MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x4001a0b0
- /* WLAN Module Reset# */
- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x4001b0b0
- >;
- };
-
- pinctrl_gpmi_nand: gpmi-nand {
- fsl,pins = <
- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
- >;
- };
-
- pinctrl_usbotg: usbotggrp {
- fsl,pins = <
- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
- MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
- /* SD1 card detect input */
- MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX6QDL_PAD_SD2_CMD__SD2_CMD 0x71
- MX6QDL_PAD_SD2_CLK__SD2_CLK 0x71
- MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x71
- MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x71
- MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71
- MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71
- >;
- };
-};
diff --git a/arch/arm/dts/imx6qdl-aristainetos2c.dtsi b/arch/arm/dts/imx6qdl-aristainetos2c.dtsi
index ba13d55..70c0177 100644
--- a/arch/arm/dts/imx6qdl-aristainetos2c.dtsi
+++ b/arch/arm/dts/imx6qdl-aristainetos2c.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0)
/*
- * support for the imx6 based aristainetos2c board
+ * support for the imx6 based aristainetos2c+2d boards
*
* Copyright (C) 2019 Heiko Schocher <hs@denx.de>
* Copyright (C) 2015 Heiko Schocher <hs@denx.de>
@@ -79,6 +79,14 @@
};
};
+&gpio7 {
+ eMMC_reset {
+ gpio-hog;
+ output-high;
+ gpios = <8 GPIO_ACTIVE_HIGH>;
+ };
+};
+
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
@@ -172,6 +180,8 @@
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x4001b0b0
/* TPM Reset */
MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x4001b0b0
+ /* eMMC Reset# */
+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x4001b0b0
>;
};
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 0646b73..9d6c344 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -128,39 +128,6 @@
imply CMD_DM
imply CMD_SATA
-config TARGET_ARISTAINETOS2
- bool "aristainetos2"
- depends on MX6DL
- select BOARD_LATE_INIT
- select SYS_I2C_MXC
- select MXC_UART
- select FEC_MXC
- select DM
- imply CMD_SATA
- imply CMD_DM
-
-config TARGET_ARISTAINETOS2B
- bool "Support aristainetos2-revB"
- depends on MX6DL
- select BOARD_LATE_INIT
- select SYS_I2C_MXC
- select MXC_UART
- select FEC_MXC
- select DM
- imply CMD_SATA
- imply CMD_DM
-
-config TARGET_ARISTAINETOS2BCSL
- bool "Support aristainetos2-revB CSL"
- depends on MX6DL
- select BOARD_LATE_INIT
- select SYS_I2C_MXC
- select MXC_UART
- select FEC_MXC
- select DM
- imply CMD_SATA
- imply CMD_DM
-
config TARGET_ARISTAINETOS2C
bool "Support aristainetos2-revC"
depends on MX6DL