diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
index af7acfa..7e2c5d0 100644
--- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
@@ -11,6 +11,7 @@
 	aliases {
 		i2c3 = &i2c4;
 		mmc0 = &sdmmc1;
+		usb0 = &usbotg_hs;
 	};
 	config {
 		u-boot,boot-led = "heartbeat";
@@ -190,7 +191,7 @@
 };
 
 &usbotg_hs {
-	usb1600;
+	force-b-session-valid;
 	hnp-srp-disable;
 };
 
diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts
index 0882765..b8ef820 100644
--- a/arch/arm/dts/stm32mp157a-dk1.dts
+++ b/arch/arm/dts/stm32mp157a-dk1.dts
@@ -249,11 +249,25 @@
 	status = "okay";
 };
 
+&usbotg_hs {
+	dr_mode = "peripheral";
+	phys = <&usbphyc_port1 0>;
+	phy-names = "usb2-phy";
+	status = "okay";
+};
+
 &usbphyc {
-	vdd3v3-supply = <&vdd_usb>;
 	status = "okay";
 };
 
+&usbphyc_port0 {
+	phy-supply = <&vdd_usb>;
+};
+
+&usbphyc_port1 {
+	phy-supply = <&vdd_usb>;
+};
+
 &vrefbuf {
 	regulator-min-microvolt = <2500000>;
 	regulator-max-microvolt = <2500000>;
diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
index 8b92b1f..5b19e44 100644
--- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
@@ -12,6 +12,7 @@
 		i2c4 = &i2c5;
 		pinctrl2 = &stmfx_pinctrl;
 		spi0 = &qspi;
+		usb0 = &usbotg_hs;
 	};
 };
 
diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi
index 472637b..9463433 100644
--- a/arch/arm/dts/stm32mp157c.dtsi
+++ b/arch/arm/dts/stm32mp157c.dtsi
@@ -825,7 +825,7 @@
 		};
 
 		usbotg_hs: usb-otg@49000000 {
-			compatible = "snps,dwc2";
+			compatible = "st,stm32mp1-hsotg", "snps,dwc2";
 			reg = <0x49000000 0x10000>;
 			clocks = <&rcc USBO_K>;
 			clock-names = "otg";
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 24d299a..b369b7a 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -7,18 +7,17 @@
 #include <config.h>
 #include <clk.h>
 #include <dm.h>
+#include <g_dnl.h>
 #include <generic-phy.h>
 #include <led.h>
 #include <misc.h>
 #include <phy.h>
 #include <reset.h>
 #include <syscon.h>
-#include <usb.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/arch/stm32.h>
 #include <power/regulator.h>
-#include <usb/dwc2_udc.h>
 
 /* SYSCFG registers */
 #define SYSCFG_BOOTR		0x00
@@ -58,11 +57,6 @@
  */
 DECLARE_GLOBAL_DATA_PTR;
 
-#define STM32MP_GUSBCFG 0x40002407
-
-#define STM32MP_GGPIO 0x38
-#define STM32MP_GGPIO_VBUS_SENSING BIT(21)
-
 #define USB_WARNING_LOW_THRESHOLD_UV	660000
 #define USB_START_LOW_THRESHOLD_UV	1230000
 #define USB_START_HIGH_THRESHOLD_UV	2100000
@@ -155,149 +149,22 @@
 #endif
 }
 
-static struct dwc2_plat_otg_data stm32mp_otg_data = {
-	.usb_gusbcfg = STM32MP_GUSBCFG,
-};
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
 
-static struct reset_ctl usbotg_reset;
-
-int board_usb_init(int index, enum usb_init_type init)
+int g_dnl_board_usb_cable_connected(void)
 {
-	struct fdtdec_phandle_args args;
-	struct udevice *dev;
-	const void *blob = gd->fdt_blob;
-	struct clk clk;
-	struct phy phy;
-	int node;
-	int phy_provider;
+	struct udevice *dwc2_udc_otg;
 	int ret;
 
-	/* find the usb otg node */
-	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
-	if (node < 0) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-
-	if (!fdtdec_get_is_enabled(blob, node)) {
-		debug("stm32 usbotg is disabled in the device tree\n");
-		return -ENODEV;
-	}
-
-	/* Enable clock */
-	ret = fdtdec_parse_phandle_with_args(blob, node, "clocks",
-					     "#clock-cells", 0, 0, &args);
-	if (ret) {
-		debug("usbotg has no clocks defined in the device tree\n");
-		return ret;
-	}
-
-	ret = uclass_get_device_by_of_offset(UCLASS_CLK, args.node, &dev);
-	if (ret)
-		return ret;
-
-	if (args.args_count != 1) {
-		debug("Can't find clock ID in the device tree\n");
-		return -ENODATA;
-	}
-
-	clk.dev = dev;
-	clk.id = args.args[0];
-
-	ret = clk_enable(&clk);
-	if (ret) {
-		debug("Failed to enable usbotg clock\n");
-		return ret;
-	}
-
-	/* Reset */
-	ret = fdtdec_parse_phandle_with_args(blob, node, "resets",
-					     "#reset-cells", 0, 0, &args);
-	if (ret) {
-		debug("usbotg has no resets defined in the device tree\n");
-		goto clk_err;
-	}
-
-	ret = uclass_get_device_by_of_offset(UCLASS_RESET, args.node, &dev);
-	if (ret || args.args_count != 1)
-		goto clk_err;
-
-	usbotg_reset.dev = dev;
-	usbotg_reset.id = args.args[0];
-
-	reset_assert(&usbotg_reset);
-	udelay(2);
-	reset_deassert(&usbotg_reset);
-
-	/* Get USB PHY */
-	ret = fdtdec_parse_phandle_with_args(blob, node, "phys",
-					     "#phy-cells", 0, 0, &args);
-	if (!ret) {
-		phy_provider = fdt_parent_offset(blob, args.node);
-		ret = uclass_get_device_by_of_offset(UCLASS_PHY,
-						     phy_provider, &dev);
-		if (ret)
-			goto clk_err;
-
-		phy.dev = dev;
-		phy.id = fdtdec_get_uint(blob, args.node, "reg", -1);
-
-		ret = generic_phy_power_on(&phy);
-		if (ret) {
-			debug("unable to power on the phy\n");
-			goto clk_err;
-		}
-
-		ret = generic_phy_init(&phy);
-		if (ret) {
-			debug("failed to init usb phy\n");
-			goto phy_power_err;
-		}
-	}
-
-	/* Parse and store data needed for gadget */
-	stm32mp_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-	if (stm32mp_otg_data.regs_otg == FDT_ADDR_T_NONE) {
-		debug("usbotg: can't get base address\n");
-		ret = -ENODATA;
-		goto phy_init_err;
-	}
-
-	stm32mp_otg_data.rx_fifo_sz = fdtdec_get_int(blob, node,
-						     "g-rx-fifo-size", 0);
-	stm32mp_otg_data.np_tx_fifo_sz = fdtdec_get_int(blob, node,
-							"g-np-tx-fifo-size", 0);
-	stm32mp_otg_data.tx_fifo_sz = fdtdec_get_int(blob, node,
-						     "g-tx-fifo-size", 0);
-	/* Enable voltage level detector */
-	if (!(fdtdec_parse_phandle_with_args(blob, node, "usb33d-supply",
-					     NULL, 0, 0, &args))) {
-		if (!uclass_get_device_by_of_offset(UCLASS_REGULATOR,
-						    args.node, &dev)) {
-			ret = regulator_set_enable(dev, true);
-			if (ret) {
-				debug("Failed to enable usb33d\n");
-				goto phy_init_err;
-			}
-		}
-	}
-		/* Enable vbus sensing */
-	setbits_le32(stm32mp_otg_data.regs_otg + STM32MP_GGPIO,
-		     STM32MP_GGPIO_VBUS_SENSING);
-
-	return dwc2_udc_probe(&stm32mp_otg_data);
-
-phy_init_err:
-	generic_phy_exit(&phy);
-
-phy_power_err:
-	generic_phy_power_off(&phy);
-
-clk_err:
-	clk_disable(&clk);
+	ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
+					  DM_GET_DRIVER(dwc2_udc_otg),
+					  &dwc2_udc_otg);
+	if (!ret)
+		debug("dwc2_udc_otg init failed\n");
 
-	return ret;
+	return dwc2_udc_B_session_valid(dwc2_udc_otg);
 }
+#endif /* CONFIG_USB_GADGET */
 
 static int get_led(struct udevice **dev, char *led_string)
 {
@@ -438,16 +305,6 @@
 	return 0;
 }
 
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	/* Reset usbotg */
-	reset_assert(&usbotg_reset);
-	udelay(2);
-	reset_deassert(&usbotg_reset);
-
-	return 0;
-}
-
 static void sysconf_init(void)
 {
 #ifndef CONFIG_STM32MP1_TRUSTED
diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
index b6c1972..fd164fa 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -69,6 +69,7 @@
 CONFIG_STM32_SERIAL=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_DM_USB_GADGET=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_GADGET=y
diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig
index ed2a2e6..f82b770 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -60,6 +60,7 @@
 CONFIG_STM32_SERIAL=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_DM_USB_GADGET=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_GADGET=y