ppc4xx/NAND: Reduce size of NAND SPL image
This is needed for the canyonlands_nand build target. Without it
the resulting image won't fit into 4k.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index 3ca13a9..0729e0c 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -201,6 +201,8 @@
#ifndef CONFIG_NAND_SPL
nand->write_buf = ndfc_write_buf;
nand->verify_buf = ndfc_verify_buf;
+
+ chip++;
#else
/*
* Setup EBC (CS0 only right now)
@@ -211,7 +213,5 @@
mtebc(PB0AP, CONFIG_SYS_EBC_PB0AP);
#endif
- chip++;
-
return 0;
}