* Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
diff --git a/include/asm-ppc/5xx_immap.h b/include/asm-ppc/5xx_immap.h
index ffff975..8e57057 100644
--- a/include/asm-ppc/5xx_immap.h
+++ b/include/asm-ppc/5xx_immap.h
@@ -17,95 +17,95 @@
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
- * Foundation,
+ * Foundation,
*/
/*
* File: 5xx_immap.h
- *
+ *
* Discription: MPC555 Internal Memory Map
- *
+ *
*/
-
+
#ifndef __IMMAP_5XX__
#define __IMMAP_5XX__
/* System Configuration Registers.
*/
typedef struct sys_conf {
- uint sc_siumcr;
- uint sc_sypcr;
- char res1[6];
- ushort sc_swsr;
- uint sc_sipend;
- uint sc_simask;
- uint sc_siel;
- uint sc_sivec;
- uint sc_tesr;
- uint sc_sgpiodt1;
- uint sc_sgpiodt2;
- uint sc_sgpiocr;
- uint sc_emcr;
- uint sc_res1aa;
- uint sc_res1ab;
- uint sc_pdmcr;
- char res3[192];
+ uint sc_siumcr;
+ uint sc_sypcr;
+ char res1[6];
+ ushort sc_swsr;
+ uint sc_sipend;
+ uint sc_simask;
+ uint sc_siel;
+ uint sc_sivec;
+ uint sc_tesr;
+ uint sc_sgpiodt1;
+ uint sc_sgpiodt2;
+ uint sc_sgpiocr;
+ uint sc_emcr;
+ uint sc_res1aa;
+ uint sc_res1ab;
+ uint sc_pdmcr;
+ char res3[192];
} sysconf5xx_t;
/* Memory Controller Registers.
*/
typedef struct mem_ctlr {
- uint memc_br0;
- uint memc_or0;
- uint memc_br1;
- uint memc_or1;
- uint memc_br2;
- uint memc_or2;
- uint memc_br3;
- uint memc_or3;
- char res1[32];
- uint memc_dmbr;
- uint memc_dmor;
- char res2[48];
- ushort memc_mstat;
- ushort memc_res4a;
- char res3[132];
+ uint memc_br0;
+ uint memc_or0;
+ uint memc_br1;
+ uint memc_or1;
+ uint memc_br2;
+ uint memc_or2;
+ uint memc_br3;
+ uint memc_or3;
+ char res1[32];
+ uint memc_dmbr;
+ uint memc_dmor;
+ char res2[48];
+ ushort memc_mstat;
+ ushort memc_res4a;
+ char res3[132];
} memctl5xx_t;
/* System Integration Timers.
*/
typedef struct sys_int_timers {
- ushort sit_tbscr;
- char res1[2];
- uint sit_tbref0;
- uint sit_tbref1;
- char res2[20];
- ushort sit_rtcsc;
- char res3[2];
- uint sit_rtc;
- uint sit_rtsec;
- uint sit_rtcal;
- char res4[16];
- ushort sit_piscr;
- char res5[2];
- uint sit_pitc;
- uint sit_pitr;
- char res6[52];
+ ushort sit_tbscr;
+ char res1[2];
+ uint sit_tbref0;
+ uint sit_tbref1;
+ char res2[20];
+ ushort sit_rtcsc;
+ char res3[2];
+ uint sit_rtc;
+ uint sit_rtsec;
+ uint sit_rtcal;
+ char res4[16];
+ ushort sit_piscr;
+ char res5[2];
+ uint sit_pitc;
+ uint sit_pitr;
+ char res6[52];
} sit5xx_t;
/* Clocks and Reset
*/
typedef struct clk_and_reset {
- uint car_sccr;
- uint car_plprcr;
- ushort car_rsr;
- ushort car_res7a;
- ushort car_colir;
- ushort car_res7b;
- ushort car_vsrmcr;
- ushort car_res7c;
- char res1[108];
+ uint car_sccr;
+ uint car_plprcr;
+ ushort car_rsr;
+ ushort car_res7a;
+ ushort car_colir;
+ ushort car_res7b;
+ ushort car_vsrmcr;
+ ushort car_res7c;
+ char res1[108];
} car5xx_t;
@@ -114,19 +114,19 @@
/* System Integration Timer Keys
*/
typedef struct sitk {
- uint sitk_tbscrk;
- uint sitk_tbref0k;
- uint sitk_tbref1k;
- uint sitk_tbk;
- char res1[16];
- uint sitk_rtcsck;
- uint sitk_rtck;
- uint sitk_rtseck;
- uint sitk_rtcalk;
- char res2[16];
- uint sitk_piscrk;
- uint sitk_pitck;
- char res3[56];
+ uint sitk_tbscrk;
+ uint sitk_tbref0k;
+ uint sitk_tbref1k;
+ uint sitk_tbk;
+ char res1[16];
+ uint sitk_rtcsck;
+ uint sitk_rtck;
+ uint sitk_rtseck;
+ uint sitk_rtcalk;
+ char res2[16];
+ uint sitk_piscrk;
+ uint sitk_pitck;
+ char res3[56];
} sitk5xx_t;
/* Clocks and Reset Keys.
@@ -145,114 +145,114 @@
/* Flash Configuration
*/
typedef struct fl {
- uint fl_cmfmcr;
- uint fl_cmftst;
- uint fl_cmfctl;
- char res1[52];
+ uint fl_cmfmcr;
+ uint fl_cmftst;
+ uint fl_cmfctl;
+ char res1[52];
} fl5xx_t;
/* Dpram Control
*/
-typedef struct dprc {
- ushort dprc_dptmcr;
- ushort dprc_ramtst;
- ushort dprc_rambar;
- ushort dprc_misrh;
- ushort dprc_misrl;
- ushort dprc_miscnt;
+typedef struct dprc {
+ ushort dprc_dptmcr;
+ ushort dprc_ramtst;
+ ushort dprc_rambar;
+ ushort dprc_misrh;
+ ushort dprc_misrl;
+ ushort dprc_miscnt;
} dprc5xx_t;
/* Time Processor Unit
*/
typedef struct tpu {
- ushort tpu_tpumcr;
- ushort tpu_tcr;
- ushort tpu_dscr;
- ushort tpu_dssr;
- ushort tpu_ticr;
- ushort tpu_cier;
- ushort tpu_cfsr0;
- ushort tpu_cfsr1;
- ushort tpu_cfsr2;
- ushort tpu_cfsr3;
- ushort tpu_hsqr0;
- ushort tpu_hsqr1;
- ushort tpu_hsrr0;
- ushort tpu_hsrr1;
- ushort tpu_cpr0;
- ushort tpu_cpr1;
- ushort tpu_cisr;
- ushort tpu_lr;
- ushort tpu_sglr;
- ushort tpu_dcnr;
- ushort tpu_tpumcr2;
- ushort tpu_tpumcr3;
- ushort tpu_isdr;
- ushort tpu_iscr;
- char res1[208];
- char tpu[16][16];
- char res2[512];
+ ushort tpu_tpumcr;
+ ushort tpu_tcr;
+ ushort tpu_dscr;
+ ushort tpu_dssr;
+ ushort tpu_ticr;
+ ushort tpu_cier;
+ ushort tpu_cfsr0;
+ ushort tpu_cfsr1;
+ ushort tpu_cfsr2;
+ ushort tpu_cfsr3;
+ ushort tpu_hsqr0;
+ ushort tpu_hsqr1;
+ ushort tpu_hsrr0;
+ ushort tpu_hsrr1;
+ ushort tpu_cpr0;
+ ushort tpu_cpr1;
+ ushort tpu_cisr;
+ ushort tpu_lr;
+ ushort tpu_sglr;
+ ushort tpu_dcnr;
+ ushort tpu_tpumcr2;
+ ushort tpu_tpumcr3;
+ ushort tpu_isdr;
+ ushort tpu_iscr;
+ char res1[208];
+ char tpu[16][16];
+ char res2[512];
} tpu5xx_t;
/* QADC
*/
typedef struct qadc {
- ushort qadc_64mcr;
- ushort qadc_64test;
- ushort qadc_64int;
- u_char qadc_portqa;
- u_char qadc_portqb;
- ushort qadc_ddrqa;
- ushort qadc_qacr0;
- ushort qadc_qacr1;
- ushort qadc_qacr2;
- ushort qadc_qasr0;
- ushort qadc_qasr1;
- char res1[492];
+ ushort qadc_64mcr;
+ ushort qadc_64test;
+ ushort qadc_64int;
+ u_char qadc_portqa;
+ u_char qadc_portqb;
+ ushort qadc_ddrqa;
+ ushort qadc_qacr0;
+ ushort qadc_qacr1;
+ ushort qadc_qacr2;
+ ushort qadc_qasr0;
+ ushort qadc_qasr1;
+ char res1[492];
/* command convertion word table */
- ushort qadc_ccw[64];
+ ushort qadc_ccw[64];
/* result word table, unsigned right justified */
- ushort qadc_rjurr[64];
+ ushort qadc_rjurr[64];
/* result word table, signed left justified */
- ushort qadc_ljsrr[64];
+ ushort qadc_ljsrr[64];
/* result word table, unsigned left justified */
- ushort qadc_ljurr[64];
+ ushort qadc_ljurr[64];
} qadc5xx_t;
/* QSMCM
*/
typedef struct qsmcm {
- ushort qsmcm_qsmcr;
- ushort qsmcm_qtest;
- ushort qsmcm_qdsci_il;
- ushort qsmcm_qspi_il;
- ushort qsmcm_scc1r0;
- ushort qsmcm_scc1r1;
- ushort qsmcm_sc1sr;
- ushort qsmcm_sc1dr;
- char res1[2];
- char res2[2];
- ushort qsmcm_portqs;
- u_char qsmcm_pqspar;
- u_char qsmcm_ddrqs;
- ushort qsmcm_spcr0;
- ushort qsmcm_spcr1;
- ushort qsmcm_spcr2;
- u_char qsmcm_spcr3;
- u_char qsmcm_spsr;
- ushort qsmcm_scc2r0;
- ushort qsmcm_scc2r1;
- ushort qsmcm_sc2sr;
- ushort qsmcm_sc2dr;
- ushort qsmcm_qsci1cr;
- ushort qsmcm_qsci1sr;
- ushort qsmcm_sctq[16];
- ushort qsmcm_scrq[16];
- char res3[212];
- ushort qsmcm_recram[32];
- ushort qsmcm_tranram[32];
- u_char qsmcm_comdram[32];
- char res[3616];
+ ushort qsmcm_qsmcr;
+ ushort qsmcm_qtest;
+ ushort qsmcm_qdsci_il;
+ ushort qsmcm_qspi_il;
+ ushort qsmcm_scc1r0;
+ ushort qsmcm_scc1r1;
+ ushort qsmcm_sc1sr;
+ ushort qsmcm_sc1dr;
+ char res1[2];
+ char res2[2];
+ ushort qsmcm_portqs;
+ u_char qsmcm_pqspar;
+ u_char qsmcm_ddrqs;
+ ushort qsmcm_spcr0;
+ ushort qsmcm_spcr1;
+ ushort qsmcm_spcr2;
+ u_char qsmcm_spcr3;
+ u_char qsmcm_spsr;
+ ushort qsmcm_scc2r0;
+ ushort qsmcm_scc2r1;
+ ushort qsmcm_sc2sr;
+ ushort qsmcm_sc2dr;
+ ushort qsmcm_qsci1cr;
+ ushort qsmcm_qsci1sr;
+ ushort qsmcm_sctq[16];
+ ushort qsmcm_scrq[16];
+ char res3[212];
+ ushort qsmcm_recram[32];
+ ushort qsmcm_tranram[32];
+ u_char qsmcm_comdram[32];
+ char res[3616];
} qsmcm5xx_t;
@@ -260,136 +260,136 @@
*/
typedef struct mios {
- ushort mios_mpwmsm0perr; /* mpwmsm0 */
- ushort mios_mpwmsm0pulr;
- ushort mios_mpwmsm0cntr;
- ushort mios_mpwmsm0scr;
- ushort mios_mpwmsm1perr; /* mpwmsm1 */
- ushort mios_mpwmsm1pulr;
- ushort mios_mpwmsm1cntr;
- ushort mios_mpwmsm1scr;
- ushort mios_mpwmsm2perr; /* mpwmsm2 */
- ushort mios_mpwmsm2pulr;
- ushort mios_mpwmsm2cntr;
- ushort mios_mpwmsm2scr;
- ushort mios_mpwmsm3perr; /* mpwmsm3 */
- ushort mios_mpwmsm3pulr;
- ushort mios_mpwmsm3cntr;
- ushort mios_mpwmsm3scr;
- char res1[16];
- ushort mios_mmcsm6cnt; /* mmcsm6 */
- ushort mios_mmcsm6mlr;
- ushort mios_mmcsm6scrd, mmcsm6scr;
- char res2[32];
- ushort mios_mdasm11ar; /* mdasm11 */
- ushort mios_mdasm11br;
- ushort mios_mdasm11scrd, mdasm11scr;
- ushort mios_mdasm12ar; /* mdasm12 */
- ushort mios_mdasm12br;
- ushort mios_mdasm12scrd, mdasm12scr;
- ushort mios_mdasm13ar; /* mdasm13 */
- ushort mios_mdasm13br;
- ushort mios_mdasm13scrd, mdasm13scr;
- ushort mios_mdasm14ar; /* mdasm14 */
- ushort mios_mdasm14br;
- ushort mios_mdasm14scrd, mdasm14scr;
- ushort mios_mdasm15ar; /* mdasm15 */
- ushort mios_mdasm15br;
- ushort mios_mdasm15scrd, mdasm15scr;
- ushort mios_mpwmsm16perr; /* mpwmsm16 */
- ushort mios_mpwmsm16pulr;
- ushort mios_mpwmsm16cntr;
- ushort mios_mpwmsm16scr;
- ushort mios_mpwmsm17perr; /* mpwmsm17 */
- ushort mios_mpwmsm17pulr;
- ushort mios_mpwmsm17cntr;
- ushort mios_mpwmsm17scr;
- ushort mios_mpwmsm18perr; /* mpwmsm18 */
- ushort mios_mpwmsm18pulr;
- ushort mios_mpwmsm18cntr;
- ushort mios_mpwmsm18scr;
- ushort mios_mpwmsm19perr; /* mpwmsm19 */
- ushort mios_mpwmsm19pulr;
- ushort mios_mpwmsm19cntr;
- ushort mios_mpwmsm19scr;
- char res3[16];
- ushort mios_mmcsm22cnt; /* mmcsm22 */
- ushort mios_mmcsm22mlr;
- ushort mios_mmcsm22scrd, mmcsm22scr;
- char res4[32];
- ushort mios_mdasm27ar; /* mdasm27 */
- ushort mios_mdasm27br;
- ushort mios_mdasm27scrd, mdasm27scr;
- ushort mios_mdasm28ar; /*mdasm28 */
- ushort mios_mdasm28br;
- ushort mios_mdasm28scrd, mdasm28scr;
- ushort mios_mdasm29ar; /* mdasm29 */
- ushort mios_mdasm29br;
- ushort mios_mdasm29scrd, mdasm29scr;
- ushort mios_mdasm30ar; /* mdasm30 */
- ushort mios_mdasm30br;
- ushort mios_mdasm30scrd, mdasm30scr;
- ushort mios_mdasm31ar; /* mdasm31 */
- ushort mios_mdasm31br;
- ushort mios_mdasm31scrd, mdasm31scr;
- ushort mios_mpiosm32dr;
- ushort mios_mpiosm32ddr;
- char res5[1788];
- ushort mios_mios1tpcr;
- char mios_res13[2];
- ushort mios_mios1vnr;
- ushort mios_mios1mcr;
- char res6[12];
- ushort mios_res42z;
- ushort mios_mcpsmscr;
- char res7[1000];
- ushort mios_mios1sr0;
- char res12[2];
- ushort mios_mios1er0;
- ushort mios_mios1rpr0;
- char res8[40];
- ushort mios_mios1lvl0;
- char res9[14];
- ushort mios_mios1sr1;
- char res10[2];
- ushort mios_mios1er1;
- ushort mios_mios1rpr1;
- char res11[40];
- ushort mios_mios1lvl1;
- char res13[1038];
+ ushort mios_mpwmsm0perr; /* mpwmsm0 */
+ ushort mios_mpwmsm0pulr;
+ ushort mios_mpwmsm0cntr;
+ ushort mios_mpwmsm0scr;
+ ushort mios_mpwmsm1perr; /* mpwmsm1 */
+ ushort mios_mpwmsm1pulr;
+ ushort mios_mpwmsm1cntr;
+ ushort mios_mpwmsm1scr;
+ ushort mios_mpwmsm2perr; /* mpwmsm2 */
+ ushort mios_mpwmsm2pulr;
+ ushort mios_mpwmsm2cntr;
+ ushort mios_mpwmsm2scr;
+ ushort mios_mpwmsm3perr; /* mpwmsm3 */
+ ushort mios_mpwmsm3pulr;
+ ushort mios_mpwmsm3cntr;
+ ushort mios_mpwmsm3scr;
+ char res1[16];
+ ushort mios_mmcsm6cnt; /* mmcsm6 */
+ ushort mios_mmcsm6mlr;
+ ushort mios_mmcsm6scrd, mmcsm6scr;
+ char res2[32];
+ ushort mios_mdasm11ar; /* mdasm11 */
+ ushort mios_mdasm11br;
+ ushort mios_mdasm11scrd, mdasm11scr;
+ ushort mios_mdasm12ar; /* mdasm12 */
+ ushort mios_mdasm12br;
+ ushort mios_mdasm12scrd, mdasm12scr;
+ ushort mios_mdasm13ar; /* mdasm13 */
+ ushort mios_mdasm13br;
+ ushort mios_mdasm13scrd, mdasm13scr;
+ ushort mios_mdasm14ar; /* mdasm14 */
+ ushort mios_mdasm14br;
+ ushort mios_mdasm14scrd, mdasm14scr;
+ ushort mios_mdasm15ar; /* mdasm15 */
+ ushort mios_mdasm15br;
+ ushort mios_mdasm15scrd, mdasm15scr;
+ ushort mios_mpwmsm16perr; /* mpwmsm16 */
+ ushort mios_mpwmsm16pulr;
+ ushort mios_mpwmsm16cntr;
+ ushort mios_mpwmsm16scr;
+ ushort mios_mpwmsm17perr; /* mpwmsm17 */
+ ushort mios_mpwmsm17pulr;
+ ushort mios_mpwmsm17cntr;
+ ushort mios_mpwmsm17scr;
+ ushort mios_mpwmsm18perr; /* mpwmsm18 */
+ ushort mios_mpwmsm18pulr;
+ ushort mios_mpwmsm18cntr;
+ ushort mios_mpwmsm18scr;
+ ushort mios_mpwmsm19perr; /* mpwmsm19 */
+ ushort mios_mpwmsm19pulr;
+ ushort mios_mpwmsm19cntr;
+ ushort mios_mpwmsm19scr;
+ char res3[16];
+ ushort mios_mmcsm22cnt; /* mmcsm22 */
+ ushort mios_mmcsm22mlr;
+ ushort mios_mmcsm22scrd, mmcsm22scr;
+ char res4[32];
+ ushort mios_mdasm27ar; /* mdasm27 */
+ ushort mios_mdasm27br;
+ ushort mios_mdasm27scrd, mdasm27scr;
+ ushort mios_mdasm28ar; /*mdasm28 */
+ ushort mios_mdasm28br;
+ ushort mios_mdasm28scrd, mdasm28scr;
+ ushort mios_mdasm29ar; /* mdasm29 */
+ ushort mios_mdasm29br;
+ ushort mios_mdasm29scrd, mdasm29scr;
+ ushort mios_mdasm30ar; /* mdasm30 */
+ ushort mios_mdasm30br;
+ ushort mios_mdasm30scrd, mdasm30scr;
+ ushort mios_mdasm31ar; /* mdasm31 */
+ ushort mios_mdasm31br;
+ ushort mios_mdasm31scrd, mdasm31scr;
+ ushort mios_mpiosm32dr;
+ ushort mios_mpiosm32ddr;
+ char res5[1788];
+ ushort mios_mios1tpcr;
+ char mios_res13[2];
+ ushort mios_mios1vnr;
+ ushort mios_mios1mcr;
+ char res6[12];
+ ushort mios_res42z;
+ ushort mios_mcpsmscr;
+ char res7[1000];
+ ushort mios_mios1sr0;
+ char res12[2];
+ ushort mios_mios1er0;
+ ushort mios_mios1rpr0;
+ char res8[40];
+ ushort mios_mios1lvl0;
+ char res9[14];
+ ushort mios_mios1sr1;
+ char res10[2];
+ ushort mios_mios1er1;
+ ushort mios_mios1rpr1;
+ char res11[40];
+ ushort mios_mios1lvl1;
+ char res13[1038];
} mios5xx_t;
/* Toucan Module
*/
typedef struct tcan {
- ushort tcan_tcnmcr;
- ushort tcan_cantcr;
- ushort tcan_canicr;
- u_char tcan_canctrl0;
- u_char tcan_canctrl1;
- u_char tcan_presdiv;
- u_char tcan_canctrl2;
- ushort tcan_timer;
- char res1[4];
- ushort tcan_rxgmskhi;
- ushort tcan_rxgmsklo;
- ushort tcan_rx14mskhi;
- ushort tcan_rx14msklo;
- ushort tcan_rx15mskhi;
- ushort tcan_rx15msklo;
- char res2[4];
- ushort tcan_estat;
- ushort tcan_imask;
- ushort tcan_iflag;
- u_char tcan_rxectr;
- u_char tcan_txectr;
- char res3[88];
- struct {
- ushort scr;
- ushort id_high;
- ushort id_low;
- u_char data[8];
- char res4[2];
+ ushort tcan_tcnmcr;
+ ushort tcan_cantcr;
+ ushort tcan_canicr;
+ u_char tcan_canctrl0;
+ u_char tcan_canctrl1;
+ u_char tcan_presdiv;
+ u_char tcan_canctrl2;
+ ushort tcan_timer;
+ char res1[4];
+ ushort tcan_rxgmskhi;
+ ushort tcan_rxgmsklo;
+ ushort tcan_rx14mskhi;
+ ushort tcan_rx14msklo;
+ ushort tcan_rx15mskhi;
+ ushort tcan_rx15msklo;
+ char res2[4];
+ ushort tcan_estat;
+ ushort tcan_imask;
+ ushort tcan_iflag;
+ u_char tcan_rxectr;
+ u_char tcan_txectr;
+ char res3[88];
+ struct {
+ ushort scr;
+ ushort id_high;
+ ushort id_low;
+ u_char data[8];
+ char res4[2];
} tcan_mbuff[16];
char res5[640];
} tcan5xx_t;
@@ -397,44 +397,43 @@
/* UIMB
*/
typedef struct uimb {
- uint uimb_umcr;
- char res1[12];
- uint uimb_utstcreg;
- char res2[12];
- uint uimb_uipend;
+ uint uimb_umcr;
+ char res1[12];
+ uint uimb_utstcreg;
+ char res2[12];
+ uint uimb_uipend;
} uimb5xx_t;
-
/* Internal Memory Map MPC555
*/
typedef struct immap {
- char res1[262144]; /* CMF Flash A 256 Kbytes */
- char res2[196608]; /* CMF Flash B 192 Kbytes */
- char res3[2670592]; /* Reserved for Flash */
- sysconf5xx_t im_siu_conf; /* SIU Configuration */
- memctl5xx_t im_memctl; /* Memory Controller */
- sit5xx_t im_sit; /* System Integration Timers */
- car5xx_t im_clkrst; /* Clocks and Reset */
- sitk5xx_t im_sitk; /* System Integration Timer Keys*/
- cark8xx_t im_clkrstk; /* Clocks and Resert Keys */
- fl5xx_t im_fla; /* Flash Module A */
- fl5xx_t im_flb; /* Flash Module B */
- char res4[14208]; /* Reserved for SIU */
- dprc5xx_t im_dprc; /* Dpram Control Register */
- char res5[8180]; /* Reserved */
- char dptram[6144]; /* Dptram */
- char res6[2048]; /* Reserved */
- tpu5xx_t im_tpua; /* Time Proessing Unit A */
- tpu5xx_t im_tpub; /* Time Processing Unit B */
- qadc5xx_t im_qadca; /* QADC A */
- qadc5xx_t im_qadcb; /* QADC B */
- qsmcm5xx_t im_qsmcm; /* SCI and SPI */
- mios5xx_t im_mios; /* MIOS */
- tcan5xx_t im_tcana; /* Toucan A */
- tcan5xx_t im_tcanb; /* Toucan B */
- char res7[1792]; /* Reserved */
- uimb5xx_t im_uimb; /* UIMB */
+ char res1[262144]; /* CMF Flash A 256 Kbytes */
+ char res2[196608]; /* CMF Flash B 192 Kbytes */
+ char res3[2670592]; /* Reserved for Flash */
+ sysconf5xx_t im_siu_conf; /* SIU Configuration */
+ memctl5xx_t im_memctl; /* Memory Controller */
+ sit5xx_t im_sit; /* System Integration Timers */
+ car5xx_t im_clkrst; /* Clocks and Reset */
+ sitk5xx_t im_sitk; /* System Integration Timer Keys*/
+ cark8xx_t im_clkrstk; /* Clocks and Resert Keys */
+ fl5xx_t im_fla; /* Flash Module A */
+ fl5xx_t im_flb; /* Flash Module B */
+ char res4[14208]; /* Reserved for SIU */
+ dprc5xx_t im_dprc; /* Dpram Control Register */
+ char res5[8180]; /* Reserved */
+ char dptram[6144]; /* Dptram */
+ char res6[2048]; /* Reserved */
+ tpu5xx_t im_tpua; /* Time Proessing Unit A */
+ tpu5xx_t im_tpub; /* Time Processing Unit B */
+ qadc5xx_t im_qadca; /* QADC A */
+ qadc5xx_t im_qadcb; /* QADC B */
+ qsmcm5xx_t im_qsmcm; /* SCI and SPI */
+ mios5xx_t im_mios; /* MIOS */
+ tcan5xx_t im_tcana; /* Toucan A */
+ tcan5xx_t im_tcanb; /* Toucan B */
+ char res7[1792]; /* Reserved */
+ uimb5xx_t im_uimb; /* UIMB */
} immap_t;
#endif /* __IMMAP_5XX__ */
diff --git a/include/asm-ppc/bitops.h b/include/asm-ppc/bitops.h
index 5326686..3264915 100644
--- a/include/asm-ppc/bitops.h
+++ b/include/asm-ppc/bitops.h
@@ -285,7 +285,7 @@
*/
#define ext2_find_first_zero_bit(addr, size) \
- ext2_find_next_zero_bit((addr), (size), 0)
+ ext2_find_next_zero_bit((addr), (size), 0)
extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr,
unsigned long size, unsigned long offset)
diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h
index f242d1b..19c7fd8 100644
--- a/include/asm-ppc/global_data.h
+++ b/include/asm-ppc/global_data.h
@@ -83,7 +83,7 @@
#endif
#ifdef CONFIG_LWMON
unsigned long kbd_status;
-#endif
+#endif
} gd_t;
/*
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 652b12b..8e5fe11 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -126,7 +126,7 @@
int ret;
__asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) :
- "r" (addr), "m" (*addr));
+ "r" (addr), "m" (*addr));
return ret;
}
@@ -141,7 +141,7 @@
extern inline void out_le16(volatile u16 *addr, int val)
{
__asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) :
- "r" (val), "r" (addr));
+ "r" (val), "r" (addr));
}
extern inline void out_be16(volatile u16 *addr, int val)
@@ -154,7 +154,7 @@
unsigned ret;
__asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
- "r" (addr), "m" (*addr));
+ "r" (addr), "m" (*addr));
return ret;
}
@@ -169,7 +169,7 @@
extern inline void out_le32(volatile unsigned *addr, int val)
{
__asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
- "r" (val), "r" (addr));
+ "r" (val), "r" (addr));
}
extern inline void out_be32(volatile unsigned *addr, int val)
diff --git a/include/asm-ppc/m8260_pci.h b/include/asm-ppc/m8260_pci.h
index 2675658..45f01de 100644
--- a/include/asm-ppc/m8260_pci.h
+++ b/include/asm-ppc/m8260_pci.h
@@ -35,8 +35,8 @@
/*
- * Outbound ATU registers (3 sets). These registers control how 60x bus (local)
- * addresses are translated to PCI addresses when the MPC826x is a PCI bus
+ * Outbound ATU registers (3 sets). These registers control how 60x bus (local)
+ * addresses are translated to PCI addresses when the MPC826x is a PCI bus
* master (initiator).
*/
@@ -87,7 +87,7 @@
#define PCIGCR_PCI_BUS_EN 0x1
/*
- * Inbound ATU registers (2 sets). These registers control how PCI addresses
+ * Inbound ATU registers (2 sets). These registers control how PCI addresses
* are translated to 60x bus (local) addresses when the MPC826x is a PCI bus target.
*/
diff --git a/include/asm-ppc/pci_io.h b/include/asm-ppc/pci_io.h
index 0f57b53..9b738c3 100644
--- a/include/asm-ppc/pci_io.h
+++ b/include/asm-ppc/pci_io.h
@@ -9,20 +9,20 @@
#define pci_read_le16(addr, dest) \
__asm__ __volatile__("lhbrx %0,0,%1" : "=r" (dest) : \
- "r" (addr), "m" (*addr));
+ "r" (addr), "m" (*addr));
#define pci_write_le16(addr, val) \
__asm__ __volatile__("sthbrx %1,0,%2" : "=m" (*addr) : \
- "r" (val), "r" (addr));
+ "r" (val), "r" (addr));
#define pci_read_le32(addr, dest) \
__asm__ __volatile__("lwbrx %0,0,%1" : "=r" (dest) : \
- "r" (addr), "m" (*addr));
+ "r" (addr), "m" (*addr));
#define pci_write_le32(addr, val) \
__asm__ __volatile__("stwbrx %1,0,%2" : "=m" (*addr) : \
- "r" (val), "r" (addr));
+ "r" (val), "r" (addr));
#define pci_readb(addr,b) ((b) = *(volatile u8 *) (addr))
#define pci_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b))
diff --git a/include/asm-ppc/pnp.h b/include/asm-ppc/pnp.h
index 15bf7f1..22ceba2 100644
--- a/include/asm-ppc/pnp.h
+++ b/include/asm-ppc/pnp.h
@@ -324,8 +324,8 @@
GeneralFloppy = 0,
Compatible765 = 1,
NS398_Floppy = 2, /* NS Super I/O wired to use index
- register at port 398 and data
- register at port 399 */
+ register at port 398 and data
+ register at port 399 */
NS26E_Floppy = 3, /* Ports 26E and 26F */
NS15C_Floppy = 4, /* Ports 15C and 15D */
NS2E_Floppy = 5, /* Ports 2E and 2F */
@@ -366,8 +366,8 @@
Compatible16450 = 2,
Compatible16550 = 3,
NS398SerPort = 4, /* NS Super I/O wired to use index
- register at port 398 and data
- register at port 399 */
+ register at port 398 and data
+ register at port 399 */
NS26ESerPort = 5, /* Ports 26E and 26F */
NS15CSerPort = 6, /* Ports 15C and 15D */
NS2ESerPort = 7, /* Ports 2E and 2F */
@@ -375,8 +375,8 @@
GeneralParPort = 0,
LPTx = 1,
NS398ParPort = 2, /* NS Super I/O wired to use index
- register at port 398 and data
- register at port 399 */
+ register at port 398 and data
+ register at port 399 */
NS26EParPort = 3, /* Ports 26E and 26F */
NS15CParPort = 4, /* Ports 15C and 15D */
NS2EParPort = 5, /* Ports 2E and 2F */
@@ -436,14 +436,14 @@
typedef struct _SERIAL_ID {
unsigned char VendorID0; /* Bit(7)=0 */
- /* Bits(6:2)=1st character in */
- /* compressed ASCII */
- /* Bits(1:0)=2nd character in */
- /* compressed ASCII bits(4:3) */
+ /* Bits(6:2)=1st character in */
+ /* compressed ASCII */
+ /* Bits(1:0)=2nd character in */
+ /* compressed ASCII bits(4:3) */
unsigned char VendorID1; /* Bits(7:5)=2nd character in */
- /* compressed ASCII bits(2:0) */
- /* Bits(4:0)=3rd character in */
- /* compressed ASCII */
+ /* compressed ASCII bits(2:0) */
+ /* Bits(4:0)=3rd character in */
+ /* compressed ASCII */
unsigned char VendorID2; /* Product number - vendor assigned */
unsigned char VendorID3; /* Product number - vendor assigned */
@@ -511,8 +511,8 @@
unsigned char Tag; /* small tag = 0x15 or 0x16 */
unsigned char DevId[4]; /* Logical device id */
unsigned char Flags[2]; /* bit(0) boot device; */
- /* bit(7:1) cmd in range x31-x37 */
- /* bit(7:0) cmd in range x28-x3f (opt)*/
+ /* bit(7:1) cmd in range x31-x37 */
+ /* bit(7:0) cmd in range x28-x3f (opt)*/
} S2_Pack;
struct _S3_Pack{ /* COMPATIBLE DEVICE ID PACKET */
@@ -523,13 +523,13 @@
struct _S4_Pack{ /* IRQ PACKET */
unsigned char Tag; /* small tag = 0x22 or 0x23 */
unsigned char IRQMask[2]; /* bit(0) is IRQ0, ...; */
- /* bit(0) is IRQ8 ... */
+ /* bit(0) is IRQ8 ... */
unsigned char IRQInfo; /* optional; assume bit(0)=1; else */
- /* bit(0) - high true edge sensitive */
- /* bit(1) - low true edge sensitive */
- /* bit(2) - high true level sensitive*/
- /* bit(3) - low true level sensitive */
- /* bit(7:4) - must be 0 */
+ /* bit(0) - high true edge sensitive */
+ /* bit(1) - low true edge sensitive */
+ /* bit(2) - high true level sensitive*/
+ /* bit(3) - low true level sensitive */
+ /* bit(7:4) - must be 0 */
} S4_Pack;
struct _S5_Pack{ /* DMA PACKET */
@@ -541,9 +541,9 @@
struct _S6_Pack{ /* START DEPENDENT FUNCTION PACKET */
unsigned char Tag; /* small tag = 0x30 or 0x31 */
unsigned char Priority; /* Optional; if missing then x01; else*/
- /* x00 = best possible */
- /* x01 = acceptible */
- /* x02 = sub-optimal but functional */
+ /* x00 = best possible */
+ /* x01 = acceptible */
+ /* x02 = sub-optimal but functional */
} S6_Pack;
struct _S7_Pack{ /* END DEPENDENT FUNCTION PACKET */
@@ -571,9 +571,9 @@
union _S14_Data{
unsigned char Data[7]; /* Vendor defined */
struct _S14_PPCPack{ /* Pr*p s14 pack */
- unsigned char Type; /* 00=non-IBM */
- unsigned char PPCData[6]; /* Vendor defined */
- } S14_PPCPack;
+ unsigned char Type; /* 00=non-IBM */
+ unsigned char PPCData[6]; /* Vendor defined */
+ } S14_PPCPack;
} S14_Data;
} S14_Pack;
@@ -587,7 +587,7 @@
unsigned char Count0; /* x09 */
unsigned char Count1; /* x00 */
unsigned char Data[9]; /* a variable array of bytes, */
- /* count in tag */
+ /* count in tag */
} L1_Pack;
struct _L2_Pack{ /* ANSI ID STRING PACKET */
@@ -595,7 +595,7 @@
unsigned char Count0; /* Length of string */
unsigned char Count1;
unsigned char Identifier[1]; /* a variable array of bytes, */
- /* count in tag */
+ /* count in tag */
} L2_Pack;
struct _L3_Pack{ /* UNICODE ID STRING PACKET */
@@ -605,7 +605,7 @@
unsigned char Country0; /* TBD */
unsigned char Country1; /* TBD */
unsigned char Identifier[1]; /* a variable array of bytes, */
- /* count in tag */
+ /* count in tag */
} L3_Pack;
struct _L4_Pack{ /* VENDOR DEFINED PACKET */
@@ -614,12 +614,12 @@
unsigned char Count1;
union _L4_Data{
unsigned char Data[1]; /* a variable array of bytes, */
- /* count in tag */
+ /* count in tag */
struct _L4_PPCPack{ /* Pr*p L4 packet */
- unsigned char Type; /* 00=non-IBM */
- unsigned char PPCData[1]; /* a variable array of bytes, */
- /* count in tag */
- } L4_PPCPack;
+ unsigned char Type; /* 00=non-IBM */
+ unsigned char PPCData[1]; /* a variable array of bytes, */
+ /* count in tag */
+ } L4_PPCPack;
} L4_Data;
} L4_Pack;
diff --git a/include/asm-ppc/ptrace.h b/include/asm-ppc/ptrace.h
index 93a75bd..3c2f4e6 100644
--- a/include/asm-ppc/ptrace.h
+++ b/include/asm-ppc/ptrace.h
@@ -105,4 +105,3 @@
#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
#endif
-
diff --git a/include/asm-ppc/residual.h b/include/asm-ppc/residual.h
index c037a4e..dc85edb 100644
--- a/include/asm-ppc/residual.h
+++ b/include/asm-ppc/residual.h
@@ -76,15 +76,15 @@
/* Box dependent stuff */
unsigned char PrintableModel[32]; /* Null terminated string.
- Must be of the form:
- vvv,<20h>,<model designation>,<0x0>
- where vvv is the vendor ID
- e.g. IBM PPS MODEL 6015<0x0> */
+ Must be of the form:
+ vvv,<20h>,<model designation>,<0x0>
+ where vvv is the vendor ID
+ e.g. IBM PPS MODEL 6015<0x0> */
unsigned char Serial[16]; /* 12/94:
- Serial Number; must be of the form:
- vvv<serial number> where vvv is the
- vendor ID.
- e.g. IBM60151234567<20h><20h> */
+ Serial Number; must be of the form:
+ vvv<serial number> where vvv is the
+ vendor ID.
+ e.g. IBM60151234567<20h><20h> */
unsigned char Reserved[48];
unsigned long FirmwareSupplier; /* See FirmwareSuppliers enum */
unsigned long FirmwareSupports; /* See FirmwareSupport enum */
@@ -103,22 +103,22 @@
unsigned long WordWidth; /* Word width in bits */
unsigned long PageSize; /* Page size in bytes */
unsigned long CoherenceBlockSize; /* Unit of transfer in/out of cache
- for which coherency is maintained;
- normally <= CacheLineSize. */
+ for which coherency is maintained;
+ normally <= CacheLineSize. */
unsigned long GranuleSize; /* Unit of lock allocation to avoid */
- /* false sharing of locks. */
+ /* false sharing of locks. */
/* L1 Cache variables */
unsigned long CacheSize; /* L1 Cache size in KB. This is the */
- /* total size of the L1, whether */
- /* combined or split */
+ /* total size of the L1, whether */
+ /* combined or split */
unsigned long CacheAttrib; /* L1CACHE_TYPE */
unsigned long CacheAssoc; /* L1 Cache associativity. Use this
- for combined cache. If split, put
- zeros here. */
+ for combined cache. If split, put
+ zeros here. */
unsigned long CacheLineSize; /* L1 Cache line size in bytes. Use
- for combined cache. If split, put
- zeros here. */
+ for combined cache. If split, put
+ zeros here. */
/* For split L1 Cache: (= combined if combined cache) */
unsigned long I_CacheSize;
unsigned long I_CacheAssoc;
@@ -131,8 +131,8 @@
unsigned long TLBSize; /* Total number of TLBs on the system */
unsigned long TLBAttrib; /* Combined I+D or split TLB */
unsigned long TLBAssoc; /* TLB Associativity. Use this for
- combined TLB. If split, put zeros
- here. */
+ combined TLB. If split, put zeros
+ here. */
/* For split TLB: (= combined if combined TLB) */
unsigned long I_TLBSize;
unsigned long I_TLBAssoc;
@@ -140,7 +140,7 @@
unsigned long D_TLBAssoc;
unsigned long ExtendedVPD; /* Offset to extended VPD area;
- null if unused */
+ null if unused */
} VPD;
typedef enum _DEVICE_FLAGS {
@@ -148,11 +148,11 @@
Integrated = 0x2000,
Failed = 0x1000, /* 1 - device failed POST code tests */
Static = 0x0800, /* 0 - dynamically configurable
- 1 - static */
+ 1 - static */
Dock = 0x0400, /* 0 - not a docking station device
- 1 - is a docking station device */
+ 1 - is a docking station device */
Boot = 0x0200, /* 0 - device cannot be used for BOOT
- 1 - can be a BOOT device */
+ 1 - can be a BOOT device */
Configurable = 0x0100, /* 1 - device is configurable */
Disableable = 0x80, /* 1 - device can be disabled */
PowerManaged = 0x40, /* 0 - not managed; 1 - managed */
@@ -180,7 +180,7 @@
unsigned long BusId; /* See BUS_ID enum above */
unsigned long DevId; /* Big Endian format */
unsigned long SerialNum; /* For multiple usage of a single
- DevId */
+ DevId */
unsigned long Flags; /* See DEVICE_FLAGS enum above */
unsigned char BaseType; /* See pnp.h for bit definitions */
unsigned char SubType; /* See pnp.h for bit definitions */
@@ -196,7 +196,7 @@
} PnPAccess;
struct _ISAAccess{
unsigned char SlotNumber; /* ISA Slot Number generally not
- available; 0 if unknown */
+ available; 0 if unknown */
unsigned char LogicalDevNumber;
unsigned short ISAReserved;
} ISAAccess;
@@ -249,9 +249,9 @@
typedef struct _PPC_CPU {
unsigned long CpuType; /* Result of mfspr from Processor
- Version Register (PVR).
- PVR(0-15) = Version (e.g. 601)
- PVR(16-31 = EC Level */
+ Version Register (PVR).
+ PVR(0-15) = Version (e.g. 601)
+ PVR(16-31 = EC Level */
unsigned char CpuNumber; /* CPU Number for this processor */
unsigned char CpuState; /* CPU State, see CPU_STATE enum */
unsigned short Reserved;
@@ -259,7 +259,7 @@
typedef struct _PPC_MEM {
unsigned long SIMMSize; /* 0 - absent or bad
- 8M, 32M (in MB) */
+ 8M, 32M (in MB) */
} PPC_MEM;
typedef enum _MEM_USAGE {
@@ -297,8 +297,8 @@
/* CPU */
unsigned short MaxNumCpus; /* Max CPUs in this system */
unsigned short ActualNumCpus; /* ActualNumCpus < MaxNumCpus means */
- /* that there are unpopulated or */
- /* otherwise unusable cpu locations */
+ /* that there are unpopulated or */
+ /* otherwise unusable cpu locations */
PPC_CPU Cpus[MAX_CPUS];
/* Memory */
unsigned long TotalMemory; /* Total amount of memory installed */
@@ -329,4 +329,3 @@
int n);
#endif /* __ASSEMBLY__ */
#endif /* ndef _RESIDUAL_ */
-