diff --git a/board/kup4k/Makefile b/board/kup4k/Makefile
new file mode 100644
index 0000000..c748d35
--- /dev/null
+++ b/board/kup4k/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2000-2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $^
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/kup4k/config.mk b/board/kup4k/config.mk
new file mode 100644
index 0000000..10e0fd4
--- /dev/null
+++ b/board/kup4k/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2000-2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# KUP4K board
+#
+
+TEXT_BASE = 0x40000000
diff --git a/board/kup4k/flash.c b/board/kup4k/flash.c
new file mode 100644
index 0000000..3837457
--- /dev/null
+++ b/board/kup4k/flash.c
@@ -0,0 +1,502 @@
+/*
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc8xx.h>
+
+#ifndef	CFG_ENV_ADDR
+#define CFG_ENV_ADDR	(CFG_FLASH_BASE + CFG_ENV_OFFSET)
+#endif
+
+#define CONFIG_FLASH_16BIT
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long *addr, flash_info_t *info);
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+	volatile memctl8xx_t *memctl = &immap->im_memctl;
+	unsigned long size_b0;
+	int i;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+
+	/* Remap FLASH according to real size */
+	memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
+	memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V | BR_PS_16;
+
+	/* Re-do sizing to get full correct info */
+	size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
+
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+	/* monitor protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_MONITOR_BASE,
+		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      &flash_info[0]);
+#endif
+
+#ifdef	CFG_ENV_IS_IN_FLASH
+	/* ENV protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_ENV_ADDR,
+		      CFG_ENV_ADDR+CFG_ENV_SIZE-1,
+		      &flash_info[0]);
+#endif
+
+	flash_info[0].size = size_b0;
+
+	return (size_b0);
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM800B:	printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM800T:	printf ("AM29LV800T (8 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM160B:	printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM320B:	printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM320T:	printf ("AM29LV320T (32 Mbit, top boot sector)\n");
+				break;
+	default:		printf ("Unknown Chip Type\n");
+				break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     "
+		);
+	}
+	printf ("\n");
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+static ulong flash_get_size (vu_long *addr, flash_info_t *info)
+{
+	short i;
+	ulong value;
+	ulong base = (ulong)addr;
+
+	/* Write auto select command: read Manufacturer ID */
+	vu_short *s_addr=(vu_short*)addr;
+	s_addr[0x5555] = 0x00AA;
+	s_addr[0x2AAA] = 0x0055;
+	s_addr[0x5555] = 0x0090;
+
+	value = s_addr[0];
+	value = value|(value<<16);
+
+	switch (value) {
+	case FUJ_MANUFACT:
+		info->flash_id = FLASH_MAN_FUJ;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* no or unknown flash	*/
+	}
+
+	value = s_addr[1];
+	value = value|(value<<16);
+
+		switch (value) {
+	case FUJI_ID_29F800BA:
+		info->flash_id += FLASH_AM400T;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		return (0);			/* => no or unknown flash */
+	}
+
+	/* set up sector start address table */
+	/* set sector offsets for bottom boot block type	*/
+	info->start[0] = base + 0x00000000;
+	info->start[1] = base + 0x00004000;
+	info->start[2] = base + 0x00006000;
+	info->start[3] = base + 0x00008000;
+	for (i = 4; i < info->sector_count; i++) {
+		info->start[i] = base + (i * 0x00010000) - 0x00030000;
+	}
+
+
+	/* check for protected sectors */
+	for (i = 0; i < info->sector_count; i++) {
+		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
+		/* D0 = 1 if protected */
+		s_addr = (volatile unsigned short *)(info->start[i]);
+		info->protect[i] = s_addr[2] & 1;
+	}
+
+	/*
+	 * Prevent writes to uninitialized FLASH.
+	 */
+	if (info->flash_id != FLASH_UNKNOWN) {
+		s_addr = (volatile unsigned short *)info->start[0];
+		*s_addr = 0x00F0;	/* reset bank */
+	}
+	return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	vu_long *addr = (vu_long*)(info->start[0]);
+	int flag, prot, sect;
+	ulong start, now, last;
+#ifdef CONFIG_FLASH_16BIT
+	vu_short *s_addr = (vu_short*)addr;
+#endif
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+/*#ifndef CONFIG_FLASH_16BIT
+	ulong type;
+	type = (info->flash_id & FLASH_VENDMASK);
+	if ((type != FLASH_MAN_SST) && (type != FLASH_MAN_STM)) {
+		printf ("Can't erase unknown flash type %08lx - aborted\n",
+			info->flash_id);
+		return;
+	}
+#endif*/
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	start = get_timer (0);
+	last  = start;
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+#ifdef CONFIG_FLASH_16BIT
+			vu_short *s_sect_addr = (vu_short*)(info->start[sect]);
+#else
+			vu_long	*sect_addr = (vu_long*)(info->start[sect]);
+#endif
+			/* Disable interrupts which might cause a timeout here */
+			flag = disable_interrupts();
+
+#ifdef CONFIG_FLASH_16BIT
+
+			/*printf("\ns_sect_addr=%x",s_sect_addr);*/
+			s_addr[0x5555] = 0x00AA;
+			s_addr[0x2AAA] = 0x0055;
+			s_addr[0x5555] = 0x0080;
+			s_addr[0x5555] = 0x00AA;
+			s_addr[0x2AAA] = 0x0055;
+			s_sect_addr[0] = 0x0030;
+#else
+			addr[0x5555] = 0x00AA00AA;
+			addr[0x2AAA] = 0x00550055;
+			addr[0x5555] = 0x00800080;
+			addr[0x5555] = 0x00AA00AA;
+			addr[0x2AAA] = 0x00550055;
+			sect_addr[0] = 0x00300030;
+#endif
+			/* re-enable interrupts if necessary */
+			if (flag)
+				enable_interrupts();
+
+			/* wait at least 80us - let's wait 1 ms */
+			udelay (1000);
+
+#ifdef CONFIG_FLASH_16BIT
+			while ((s_sect_addr[0] & 0x0080) != 0x0080) {
+#else
+			while ((sect_addr[0] & 0x00800080) != 0x00800080) {
+#endif
+				if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+					printf ("Timeout\n");
+					return 1;
+				}
+				/* show that we're waiting */
+				if ((now - last) > 1000) {	/* every second */
+					putc ('.');
+					last = now;
+				}
+			}
+		}
+	}
+
+	/* reset to read mode */
+	addr = (volatile unsigned long *)info->start[0];
+#ifdef CONFIG_FLASH_16BIT
+	s_addr[0] = 0x00F0;	/* reset bank */
+#else
+	addr[0] = 0x00F000F0;	/* reset bank */
+#endif
+
+	printf (" done\n");
+	return 0;
+}
+
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp, data;
+	int i, l, rc;
+
+	wp = (addr & ~3);	/* get lower word aligned address */
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i=0, cp=wp; i<l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+		for (; i<4 && cnt>0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt==0 && i<4; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 4;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= 4) {
+		data = 0;
+		for (i=0; i<4; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp  += 4;
+		cnt -= 4;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i<4; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_word(info, wp, data));
+}
+
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data)
+{
+	vu_long *addr = (vu_long*)(info->start[0]);
+
+#ifdef CONFIG_FLASH_16BIT
+	vu_short high_data;
+	vu_short low_data;
+	vu_short *s_addr = (vu_short*)addr;
+#endif
+	ulong start;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*((vu_long *)dest) & data) != data) {
+		return (2);
+	}
+
+#ifdef CONFIG_FLASH_16BIT
+	/* Write the 16 higher-bits */
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	high_data = ((data>>16) & 0x0000ffff);
+
+	s_addr[0x5555] = 0x00AA;
+	s_addr[0x2AAA] = 0x0055;
+	s_addr[0x5555] = 0x00A0;
+
+	*((vu_short *)dest) = high_data;
+
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	/* data polling for D7 */
+	start = get_timer (0);
+	while ((*((vu_short *)dest) & 0x0080) != (high_data & 0x0080)) {
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			return (1);
+		}
+	}
+
+
+	/* Write the 16 lower-bits */
+#endif
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+#ifdef CONFIG_FLASH_16BIT
+	dest += 0x2;
+	low_data = (data & 0x0000ffff);
+
+	s_addr[0x5555] = 0x00AA;
+	s_addr[0x2AAA] = 0x0055;
+	s_addr[0x5555] = 0x00A0;
+	*((vu_short *)dest) = low_data;
+
+#else
+	addr[0x5555] = 0x00AA00AA;
+	addr[0x2AAA] = 0x00550055;
+	addr[0x5555] = 0x00A000A0;
+	*((vu_long *)dest) = data;
+#endif
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	/* data polling for D7 */
+	start = get_timer (0);
+
+#ifdef CONFIG_FLASH_16BIT
+	while ((*((vu_short *)dest) & 0x0080) != (low_data & 0x0080)) {
+#else
+	while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
+#endif
+
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			return (1);
+		}
+	}
+	return (0);
+}
diff --git a/board/kup4k/kup4k.c b/board/kup4k/kup4k.c
new file mode 100644
index 0000000..86e1c81
--- /dev/null
+++ b/board/kup4k/kup4k.c
@@ -0,0 +1,424 @@
+/*
+ * (C) Copyright 2000, 2001, 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc8xx.h>
+#ifdef CONFIG_KUP4K_LOGO
+   #include "s1d13706.h"
+#endif
+
+
+typedef struct
+{
+    volatile unsigned char *VmemAddr;
+    volatile unsigned char *RegAddr;
+}FB_INFO_S1D13xxx;
+
+/* ------------------------------------------------------------------------- */
+
+#if 0
+static long int dram_size (long int, long int *, long int);
+#endif
+
+#ifdef CONFIG_KUP4K_LOGO
+   void lcd_logo(bd_t *bd);
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+#define	_NOT_USED_	0xFFFFFFFF
+
+const uint sdram_table[] =
+{
+	/*
+	 * Single Read. (Offset 0 in UPMA RAM)
+	 */
+	0x1F07FC04,
+	0xEEAEFC04,
+	0x11ADFC04,
+	0xEFBBBC00,
+	0x1FF77C47, /* last */
+
+	/*
+	 * SDRAM Initialization (offset 5 in UPMA RAM)
+	 *
+	 * This is no UPM entry point. The following definition uses
+	 * the remaining space to establish an initialization
+	 * sequence, which is executed by a RUN command.
+	 *
+	 */
+	0x1FF77C35,
+	0xEFEABC34,
+	0x1FB57C35,  /* last */
+
+	/*
+	 * Burst Read. (Offset 8 in UPMA RAM)
+	 */
+	0x1F07FC04,
+	0xEEAEFC04,
+	0x10ADFC04,
+	0xF0AFFC00,
+	0xF0AFFC00,
+	0xF1AFFC00,
+	0xEFBBBC00,
+	0x1FF77C47, /* last */
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+
+	/*
+	 * Single Write. (Offset 18 in UPMA RAM)
+	 */
+	0x1F27FC04,
+	0xEEAEBC00,
+	0x01B93C04,
+    0x1FF77C47, /* last */
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+
+	/*
+	 * Burst Write. (Offset 20 in UPMA RAM)
+	 */
+	0x1F07FC04,
+	0xEEAEBC00,
+	0x10AD7C00,
+	0xF0AFFC00,
+	0xF0AFFC00,
+	0xE1BBBC04,
+	0x1FF77C47, /* last */
+    _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+
+	/*
+	 * Refresh  (Offset 30 in UPMA RAM)
+	 */
+	0x1FF5FC84,
+	0xFFFFFC04,
+	0xFFFFFC04,
+	0xFFFFFC04,
+	0xFFFFFC84,
+	0xFFFFFC07, /* last */
+	_NOT_USED_, _NOT_USED_,
+	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+
+	/*
+	 * Exception. (Offset 3c in UPMA RAM)
+	 */
+	0x7FFFFC07, /* last */
+		    _NOT_USED_, _NOT_USED_, _NOT_USED_,
+};
+
+/* ------------------------------------------------------------------------- */
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+
+	printf ("### No HW ID - assuming KUP4K-Color\n");
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+    volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+    volatile memctl8xx_t *memctl = &immap->im_memctl;
+    long int size_b0 = 0;
+    long int size_b1 = 0;
+    long int size_b2 = 0;
+
+    upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
+
+    /*
+     * Preliminary prescaler for refresh (depends on number of
+     * banks): This value is selected for four cycles every 62.4 us
+     * with two SDRAM banks or four cycles every 31.2 us with one
+     * bank. It will be adjusted after memory sizing.
+     */
+    memctl->memc_mptpr = CFG_MPTPR;
+
+    memctl->memc_mar  = 0x00000088;
+
+    /*
+     * Map controller banks 1 and 2 to the SDRAM banks 2 and 3 at
+     * preliminary addresses - these have to be modified after the
+     * SDRAM size has been determined.
+     */
+/*    memctl->memc_or1 = CFG_OR1_PRELIM;	*/
+/*    memctl->memc_br1 = CFG_BR1_PRELIM;	*/
+ 
+/*	memctl->memc_or2 = CFG_OR2_PRELIM;	*/
+/*	memctl->memc_br2 = CFG_BR2_PRELIM;	*/
+
+
+    memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
+
+    udelay(200);
+
+    /* perform SDRAM initializsation sequence */
+
+    memctl->memc_mcr  = 0x80002105;	/* SDRAM bank 0 */
+    udelay(1);
+    memctl->memc_mcr  = 0x80002830;	/* SDRAM bank 0 - execute twice */
+    udelay(1);
+    memctl->memc_mcr  = 0x80002106;	/* SDRAM bank 0 - RUN MRS Pattern from loc 6 */
+    udelay(1);
+
+	memctl->memc_mcr  = 0x80004105;	/* SDRAM bank 1 */
+	udelay(1);
+	memctl->memc_mcr  = 0x80004830;	/* SDRAM bank 1 - execute twice */
+	udelay(1);
+    memctl->memc_mcr  = 0x80004106;	/* SDRAM bank 1 - RUN MRS Pattern from loc 6 */
+    udelay(1);
+
+	memctl->memc_mcr  = 0x80006105;	/* SDRAM bank 2 */
+	udelay(1);
+	memctl->memc_mcr  = 0x80006830;	/* SDRAM bank 2 - execute twice */
+	udelay(1);
+    memctl->memc_mcr  = 0x80006106;	/* SDRAM bank 2 - RUN MRS Pattern from loc 6 */
+    udelay(1);
+
+
+    memctl->memc_mamr |= MAMR_PTAE;	/* enable refresh */
+
+    udelay (1000);
+
+    size_b0 = 0x00800000;
+    size_b1 = 0x00800000;
+    size_b2 = 0x00800000;
+
+
+	memctl->memc_mptpr = CFG_MPTPR;
+	udelay(1000);
+
+	memctl->memc_or1 = 0xFF800A00;
+	memctl->memc_br1 = 0x00000081;
+
+    memctl->memc_or2 = 0xFF000A00;
+    memctl->memc_br2 = 0x00800081;
+
+	memctl->memc_or3 = 0xFE000A00;
+	memctl->memc_br3 = 0x01000081;
+
+    udelay(10000);
+
+
+    return (size_b0 + size_b1 + size_b2);
+}
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Check memory range for valid RAM. A simple memory test determines
+ * the actually available RAM size between addresses `base' and
+ * `base + maxsize'. Some (not all) hardware errors are detected:
+ * - short between address lines
+ * - short between data lines
+ */
+#if 0
+static long int dram_size (long int mamr_value, long int *base, long int maxsize)
+{
+    volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+    volatile memctl8xx_t *memctl = &immap->im_memctl;
+    volatile long int	 *addr;
+    ulong		  cnt, val;
+    ulong		  save[32];	/* to make test non-destructive */
+    unsigned char	  i = 0;
+
+    memctl->memc_mamr = mamr_value;
+
+    for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) {
+	addr = base + cnt;	/* pointer arith! */
+
+	save[i++] = *addr;
+	*addr = ~cnt;
+    }
+
+    /* write 0 to base address */
+    addr = base;
+    save[i] = *addr;
+    *addr = 0;
+
+    /* check at base address */
+    if ((val = *addr) != 0) {
+	*addr = save[i];
+	return (0);
+    }
+
+    for (cnt = 1; cnt <= maxsize/sizeof(long); cnt <<= 1) {
+	addr = base + cnt;	/* pointer arith! */
+
+	val = *addr;
+	*addr = save[--i];
+
+	if (val != (~cnt)) {
+	    return (cnt * sizeof(long));
+	}
+    }
+    return (maxsize);
+}
+#endif
+
+int misc_init_r (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_KUP4K_LOGO
+	bd_t *bd = gd->bd;
+
+
+	lcd_logo(bd);
+#endif /* CONFIG_KUP4K_LOGO */
+	return(0);
+}
+
+#ifdef CONFIG_KUP4K_LOGO
+void lcd_logo(bd_t *bd){
+
+    FB_INFO_S1D13xxx fb_info;
+    S1D_INDEX s1dReg;
+    S1D_VALUE s1dValue;
+    volatile immap_t     *immr  = (immap_t *)CFG_IMMR;
+    volatile	memctl8xx_t     *memctl;
+	ushort i;
+	uchar *fb;
+    int rs, gs, bs;
+    int r = 8, g = 8, b = 4;
+    int r1,g1,b1;
+
+/*----------------------------------------------------------------------------- */
+/**/
+/* Initialize the chip and the frame buffer driver. */
+/**/
+/*----------------------------------------------------------------------------- */
+    memctl = &immr->im_memctl;
+/*    memctl->memc_or5 = 0xFFC007F0;    / * 4 MB  17 WS or externel TA */
+/*    memctl->memc_br5 = 0x80000801;    / * Start at 0x80000000 */
+
+    memctl->memc_or5 = 0xFFC00708;    /* 4 MB  17 WS or externel TA */
+    memctl->memc_br5 = 0x80080801;    /* Start at 0x80080000 */
+
+
+
+
+
+    fb_info.VmemAddr = (unsigned char*)(S1D_PHYSICAL_VMEM_ADDR);
+    fb_info.RegAddr =  (unsigned char*)(S1D_PHYSICAL_REG_ADDR);
+
+    if ((((S1D_VALUE*)fb_info.RegAddr)[0] != 0x28) || (((S1D_VALUE*)fb_info.RegAddr)[1] != 0x14))
+    {
+	  printf("Warning:LCD Controller S1D13706 not found\n");
+	  return;
+    }
+
+    /* init controller */
+    for (i = 0; i < sizeof(aS1DRegs)/sizeof(aS1DRegs[0]); i++)
+    {
+        s1dReg = aS1DRegs[i].Index;
+        s1dValue = aS1DRegs[i].Value;
+/*      printf("sid1 Index: %02x Register: %02x Wert: %02x\n",i, aS1DRegs[i].Index, aS1DRegs[i].Value); */
+        ((S1D_VALUE*)fb_info.RegAddr)[s1dReg/sizeof(S1D_VALUE)] = s1dValue;
+    }
+
+#undef MONOCHROME
+#ifdef MONOCHROME
+   	switch(bd->bi_busfreq){
+#if 0
+		case 24000000:
+			((S1D_VALUE*)fb_info.RegAddr)[0x05] = 0x32;
+			((S1D_VALUE*)fb_info.RegAddr)[0x12] = 0x28;
+			break;
+		case 32000000:
+			((S1D_VALUE*)fb_info.RegAddr)[0x05] = 0x32;
+			((S1D_VALUE*)fb_info.RegAddr)[0x12] = 0x33;
+			break;
+#endif
+		case 40000000:
+			((S1D_VALUE*)fb_info.RegAddr)[0x05] = 0x32;
+			((S1D_VALUE*)fb_info.RegAddr)[0x12] = 0x40;
+			break;
+		case 48000000:
+			((S1D_VALUE*)fb_info.RegAddr)[0x05] = 0x32;
+			((S1D_VALUE*)fb_info.RegAddr)[0x12] = 0x4C;
+			break;
+		default:
+			printf("KUP4K S1D1: unknown busfrequency: %ld assuming 64 MHz\n",bd->bi_busfreq);
+		case 64000000:
+			((S1D_VALUE*)fb_info.RegAddr)[0x05] = 0x32;
+			((S1D_VALUE*)fb_info.RegAddr)[0x12] = 0x69;
+			break;
+	}
+	((S1D_VALUE*)fb_info.RegAddr)[0x10] = 0x00;
+#else
+	   	switch(bd->bi_busfreq){
+#if 0
+		case 24000000:
+			((S1D_VALUE*)fb_info.RegAddr)[0x05] = 0x22;
+			((S1D_VALUE*)fb_info.RegAddr)[0x12] = 0x34;
+			break;
+		case 32000000:
+			((S1D_VALUE*)fb_info.RegAddr)[0x05] = 0x32;
+			((S1D_VALUE*)fb_info.RegAddr)[0x12] = 0x34;
+			break;
+#endif
+		case 40000000:
+			((S1D_VALUE*)fb_info.RegAddr)[0x05] = 0x32;
+			((S1D_VALUE*)fb_info.RegAddr)[0x12] = 0x41;
+			break;
+		case 48000000:
+			((S1D_VALUE*)fb_info.RegAddr)[0x05] = 0x22;
+			((S1D_VALUE*)fb_info.RegAddr)[0x12] = 0x34;
+			break;
+		default:
+			printf("KUP4K S1D1: unknown busfrequency: %ld assuming 64 MHz\n",bd->bi_busfreq);
+		case 64000000:
+			((S1D_VALUE*)fb_info.RegAddr)[0x05] = 0x32;
+			((S1D_VALUE*)fb_info.RegAddr)[0x12] = 0x66;
+			break;
+	}
+#endif
+
+    
+    /* create and set colormap */
+    rs = 256 / (r - 1);
+    gs = 256 / (g - 1);
+    bs = 256 / (b - 1);
+	for(i=0;i<256;i++){
+       r1=(rs * ((i / (g * b)) % r)) * 255;
+       g1=(gs * ((i / b) % g)) * 255;
+       b1=(bs * ((i) % b)) * 255;
+/*     printf("%d %04x %04x %04x\n",i,r1>>4,g1>>4,b1>>4); */
+       S1D_WRITE_PALETTE(fb_info.RegAddr,i,(r1>>4),(g1>>4),(b1>>4));
+    }
+
+    /* copy bitmap */
+	fb   = (char *) (fb_info.VmemAddr);
+	memcpy (fb, (uchar *)CONFIG_KUP4K_LOGO, 320 * 240);
+}
+#endif /* CONFIG_KUP4K_LOGO */
+
diff --git a/board/kup4k/s1d13706.h b/board/kup4k/s1d13706.h
new file mode 100644
index 0000000..4eeea39
--- /dev/null
+++ b/board/kup4k/s1d13706.h
@@ -0,0 +1,115 @@
+/*---------------------------------------------------------------------------- */
+/* */
+/*  File generated by S1D13706CFG.EXE */
+/* */
+/*  Copyright (c) 2000,2001 Epson Research and Development, Inc. */
+/*  All rights reserved. */
+/* */
+/*---------------------------------------------------------------------------- */
+
+/* Panel: 320x240x8bpp 70Hz Color Single STN 8-bit (PCLK=6.250MHz) (Format 2) */
+
+#define S1D_DISPLAY_WIDTH           320
+#define S1D_DISPLAY_HEIGHT          240
+#define S1D_DISPLAY_BPP             8
+#define S1D_DISPLAY_SCANLINE_BYTES  320
+#define S1D_PHYSICAL_VMEM_ADDR      0x800A0000L
+#define S1D_PHYSICAL_VMEM_SIZE      0x14000L
+#define S1D_PHYSICAL_REG_ADDR       0x80080000L
+#define S1D_PHYSICAL_REG_SIZE       0x100
+#define S1D_DISPLAY_PCLK            6250
+#define S1D_PALETTE_SIZE            256
+#define S1D_REGDELAYOFF             0xFFFE
+#define S1D_REGDELAYON              0xFFFF
+
+#define S1D_WRITE_PALETTE(p,i,r,g,b)  \
+{  \
+    ((volatile S1D_VALUE*)(p))[0x0A/sizeof(S1D_VALUE)] = (S1D_VALUE)((r)>>4);  \
+    ((volatile S1D_VALUE*)(p))[0x09/sizeof(S1D_VALUE)] = (S1D_VALUE)((g)>>4);  \
+    ((volatile S1D_VALUE*)(p))[0x08/sizeof(S1D_VALUE)] = (S1D_VALUE)((b)>>4);  \
+    ((volatile S1D_VALUE*)(p))[0x0B/sizeof(S1D_VALUE)] = (S1D_VALUE)(i);  \
+}
+
+#define S1D_READ_PALETTE(p,i,r,g,b)  \
+{  \
+    ((volatile S1D_VALUE*)(p))[0x0F/sizeof(S1D_VALUE)] = (S1D_VALUE)(i);  \
+    r = ((volatile S1D_VALUE*)(p))[0x0E/sizeof(S1D_VALUE)];  \
+    g = ((volatile S1D_VALUE*)(p))[0x0D/sizeof(S1D_VALUE)];  \
+    b = ((volatile S1D_VALUE*)(p))[0x0C/sizeof(S1D_VALUE)];  \
+}
+
+typedef unsigned short S1D_INDEX;
+typedef unsigned char  S1D_VALUE;
+
+
+typedef struct
+{
+    S1D_INDEX Index;
+    S1D_VALUE Value;
+} S1D_REGS;
+
+static S1D_REGS aS1DRegs[] =
+{
+
+
+    {0x04,0x10},   /* BUSCLK MEMCLK Config Register */
+#if 0
+    {0x05,0x32},   /* PCLK Config  Register  */
+#endif
+    {0x10,0xD0},   /* PANEL Type Register */
+    {0x11,0x00},   /* MOD Rate Register */
+#if 0
+    {0x12,0x34},   /* Horizontal Total Register */
+#endif
+    {0x14,0x27},   /* Horizontal Display Period Register */
+    {0x16,0x00},   /* Horizontal Display Period Start Pos Register 0 */
+    {0x17,0x00},   /* Horizontal Display Period Start Pos Register 1 */
+    {0x18,0xF0},   /* Vertical Total Register 0  */
+    {0x19,0x00},   /* Vertical Total Register 1 */
+    {0x1C,0xEF},   /* Vertical Display Period Register 0 */
+    {0x1D,0x00},   /* Vertical Display Period Register 1 */
+    {0x1E,0x00},   /* Vertical Display Period Start Pos Register 0 */
+    {0x1F,0x00},   /* Vertical Display Period Start Pos Register 1 */
+    {0x20,0x87},   /* Horizontal Sync Pulse Width Register */
+    {0x22,0x00},   /* Horizontal Sync Pulse Start Pos Register 0 */
+    {0x23,0x00},   /* Horizontal Sync Pulse Start Pos Register 1 */
+    {0x24,0x80},   /* Vertical Sync Pulse Width Register */
+    {0x26,0x01},   /* Vertical Sync Pulse Start Pos Register 0 */
+    {0x27,0x00},   /* Vertical Sync Pulse Start Pos Register 1 */
+    {0x70,0x83},   /* Display Mode Register */
+    {0x71,0x00},   /* Special Effects Register */
+    {0x74,0x00},   /* Main Window Display Start Address Register 0 */
+    {0x75,0x00},   /* Main Window Display Start Address Register 1 */
+    {0x76,0x00},   /* Main Window Display Start Address Register 2 */
+    {0x78,0x50},   /* Main Window Address Offset Register 0 */
+    {0x79,0x00},   /* Main Window Address Offset Register 1 */
+    {0x7C,0x00},   /* Sub Window Display Start Address Register 0 */
+    {0x7D,0x00},   /* Sub Window Display Start Address Register 1 */
+    {0x7E,0x00},   /* Sub Window Display Start Address Register 2 */
+    {0x80,0x50},   /* Sub Window Address Offset Register 0 */
+    {0x81,0x00},   /* Sub Window Address Offset Register 1 */
+    {0x84,0x00},   /* Sub Window X Start Pos Register 0 */
+    {0x85,0x00},   /* Sub Window X Start Pos Register 1 */
+    {0x88,0x00},   /* Sub Window Y Start Pos Register 0 */
+    {0x89,0x00},   /* Sub Window Y Start Pos Register 1 */
+    {0x8C,0x4F},   /* Sub Window X End Pos Register 0 */
+    {0x8D,0x00},   /* Sub Window X End Pos Register 1 */
+    {0x90,0xEF},   /* Sub Window Y End Pos Register 0 */
+    {0x91,0x00},   /* Sub Window Y End Pos Register 1 */
+    {0xA0,0x00},   /* Power Save Config Register */
+    {0xA1,0x00},   /* CPU Access Control Register */
+    {0xA2,0x00},   /* Software Reset Register */
+    {0xA3,0x00},   /* BIG Endian Support Register */
+    {0xA4,0x00},   /* Scratch Pad Register 0 */
+    {0xA5,0x00},   /* Scratch Pad Register 1 */
+    {0xA8,0x01},   /* GPIO Config Register 0 */
+    {0xA9,0x80},   /* GPIO Config Register 1 */
+    {0xAC,0x01},   /* GPIO Status Control Register 0 */
+    {0xAD,0x00},   /* GPIO Status Control Register 1 */
+    {0xB0,0x00},   /* PWM CV Clock Control Register */
+    {0xB1,0x00},   /* PWM CV Clock Config Register */
+    {0xB2,0x00},   /* CV Clock Burst Length Register */
+    {0xB3,0x00},   /* PWM Clock Duty Cycle Register */
+    {0xAD,0x80},   /* reset seq */
+	{0x70,0x03},   /*  */
+};
diff --git a/board/kup4k/u-boot.lds b/board/kup4k/u-boot.lds
new file mode 100644
index 0000000..3a1beee
--- /dev/null
+++ b/board/kup4k/u-boot.lds
@@ -0,0 +1,136 @@
+/*
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)	}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)	}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)	}
+  .rela.got      : { *(.rela.got)	}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)	}
+  .rela.bss      : { *(.rela.bss)	}
+  .rel.plt       : { *(.rel.plt)	}
+  .rela.plt      : { *(.rela.plt)	}
+  .init          : { *(.init)		}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mpc8xx/start.o		(.text)
+    cpu/mpc8xx/traps.o		(.text)
+    common/dlmalloc.o		(.text)
+    lib_ppc/ppcstring.o		(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_generic/zlib.o		(.text)
+    lib_ppc/cache.o		(.text)
+    lib_ppc/time.o		(.text)
+
+    . = env_offset;
+    common/environment.o	(.ppcenv)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+
diff --git a/board/kup4k/u-boot.lds.debug b/board/kup4k/u-boot.lds.debug
new file mode 100644
index 0000000..fdd836e
--- /dev/null
+++ b/board/kup4k/u-boot.lds.debug
@@ -0,0 +1,131 @@
+/*
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mpc8xx/start.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+
+    . = env_offset;
+    common/environment.o(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+