tree 703accd96cefcc39935cc2819f10b74075e83164
parent b210f21fab0a01520ce1b244ea96fc8d21d7634d
author Neil Armstrong <neil.armstrong@linaro.org> 1732523666 +0100
committer Caleb Connolly <caleb.connolly@linaro.org> 1737560175 +0100

clk: qcom: add clk_phy_mux_enable() for PCIe PIPE clock

The PCIe PIPE clock requires a special setup function to
mux & enable the clock from the PCIe PHY before the PHY
has enabled the clock.

Import the clk_phy_mux_enable() from the Linux driver to
use the same implementation regarding the PIPE clock.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-clk-v1-1-4315d1e4e164@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>