commit | 9def8a07257e14cb2f8352d20b5754a5248a4c50 | [log] [tgz] |
---|---|---|
author | Kumar Gala <galak@kernel.crashing.org> | Mon Jul 14 14:07:02 2008 -0500 |
committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | Mon Jul 14 20:19:59 2008 -0500 |
tree | fa1cf8a170572b65af737680b1000d0324099c60 | |
parent | fda2f3a29effaebaa5972bd19aabfd2c298dcc64 [diff] |
85xx: Add some L1/L2 SPR register definitions Add new L1/L2 SPRs related to e500mc cache config and control. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>