Coding style cleanup, update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c
index 18308c8..66f9164 100644
--- a/cpu/mcf52x2/cpu_init.c
+++ b/cpu/mcf52x2/cpu_init.c
@@ -131,7 +131,7 @@
mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */
mbar2_writeByte(MCFSIM_SPURVEC, 0x00);
- /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */
+ /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */
/* FlexBus Chipselect */
init_fbcs();
diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S
index 6645cb8..63cc8db 100644
--- a/cpu/mpc86xx/start.S
+++ b/cpu/mpc86xx/start.S
@@ -982,5 +982,3 @@
blr
#endif
#endif
-
-
diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index 1f0b56c..d09c4c2 100644
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -706,4 +706,3 @@
#endif
return 0;
}
-
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index 4b5349e..f2b8908 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -727,7 +727,7 @@
ori r2,r2,0xffff
mfdcr r1,ISRAM1_DPC
and r1,r1,r2 /* Disable parity check */
- mtdcr ISRAM1_DPC,r1
+ mtdcr ISRAM1_DPC,r1
mfdcr r1,ISRAM1_PMEG
and r1,r1,r2 /* Disable pwr mgmt */
mtdcr ISRAM1_PMEG,r1