commit 54a1fb633ddd5b2e69c770a4faa851014c83d9ea
author Álvaro Fernández Rojas <noltari@gmail.com> Sun Feb 04 11:19:11 2018 +0100
committer Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Wed Mar 21 23:23:13 2018 +0100
tree 0990f5f38a9fb7566bd40d11208c44088d324d95
parent 0f636280a57b8c8db2cfdd5545f24a289a3a563b

phy: add support for bcm6358 usbh phy

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

drivers/phy/Kconfig

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index cec2130..43fb4c9 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -65,6 +65,12 @@
 	help
 	  Support for the Broadcom MIPS BCM6348 USBH PHY.
 
+config BCM6358_USBH_PHY
+	bool "BCM6358 USBH PHY support"
+	depends on PHY && ARCH_BMIPS
+	help
+	  Support for the Broadcom MIPS BCM6358 USBH PHY.
+
 config PIPE3_PHY
 	bool "Support omap's PIPE3 PHY"
 	depends on PHY && ARCH_OMAP2PLUS

drivers/phy/Makefile

diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 06e01e8..04843fd 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -8,6 +8,7 @@
 obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
 obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o
+obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
 obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o

drivers/phy/bcm6358-usbh-phy.c

diff --git a/drivers/phy/bcm6358-usbh-phy.c b/drivers/phy/bcm6358-usbh-phy.c
new file mode 100644
index 0000000..e000316
--- /dev/null
+++ b/drivers/phy/bcm6358-usbh-phy.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/bcm63xx/usb-common.c:
+ *	Copyright 2008 Maxime Bizon <mbizon@freebox.fr>
+ *	Copyright 2013 Florian Fainelli <florian@openwrt.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <reset.h>
+#include <asm/io.h>
+#include <dm/device.h>
+
+/* USBH Swap Control register */
+#define USBH_SWAP_REG		0x00
+#define USBH_SWAP_OHCI_DATA	BIT(0)
+#define USBH_SWAP_OHCI_ENDIAN	BIT(1)
+#define USBH_SWAP_EHCI_DATA	BIT(3)
+#define USBH_SWAP_EHCI_ENDIAN	BIT(4)
+
+/* USBH Test register */
+#define USBH_TEST_REG		0x24
+#define USBH_TEST_PORT_CTL	0x1c0020
+
+struct bcm6358_usbh_priv {
+	void __iomem *regs;
+};
+
+static int bcm6358_usbh_init(struct phy *phy)
+{
+	struct bcm6358_usbh_priv *priv = dev_get_priv(phy->dev);
+
+	/* configure to work in native cpu endian */
+	clrsetbits_be32(priv->regs + USBH_SWAP_REG,
+			USBH_SWAP_EHCI_ENDIAN | USBH_SWAP_OHCI_ENDIAN,
+			USBH_SWAP_EHCI_DATA | USBH_SWAP_OHCI_DATA);
+
+	/* test port control */
+	writel_be(USBH_TEST_PORT_CTL, priv->regs + USBH_TEST_REG);
+
+	return 0;
+}
+
+static struct phy_ops bcm6358_usbh_ops = {
+	.init = bcm6358_usbh_init,
+};
+
+static const struct udevice_id bcm6358_usbh_ids[] = {
+	{ .compatible = "brcm,bcm6358-usbh" },
+	{ /* sentinel */ }
+};
+
+static int bcm6358_usbh_probe(struct udevice *dev)
+{
+	struct bcm6358_usbh_priv *priv = dev_get_priv(dev);
+	struct reset_ctl rst_ctl;
+	fdt_addr_t addr;
+	fdt_size_t size;
+	int ret;
+
+	addr = devfdt_get_addr_size_index(dev, 0, &size);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	priv->regs = ioremap(addr, size);
+
+	/* perform reset */
+	ret = reset_get_by_index(dev, 0, &rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	ret = reset_deassert(&rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	ret = reset_free(&rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(bcm6358_usbh) = {
+	.name = "bcm6358-usbh",
+	.id = UCLASS_PHY,
+	.of_match = bcm6358_usbh_ids,
+	.ops = &bcm6358_usbh_ops,
+	.priv_auto_alloc_size = sizeof(struct bcm6358_usbh_priv),
+	.probe = bcm6358_usbh_probe,
+};