* Code cleanup, mostly for GCC-3.3.x
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to
pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for
additional ethernet addresses.
* Cleanup drivers/i82365.c - avoid duplication of code
* Fix bogus "cannot span across banks" flash error message
* Add support for CompactFlash for the CPC45 Board.
diff --git a/board/cpc45/Makefile b/board/cpc45/Makefile
index db5a83b..ccb811b 100644
--- a/board/cpc45/Makefile
+++ b/board/cpc45/Makefile
@@ -25,7 +25,7 @@
LIB = lib$(BOARD).a
-OBJS = $(BOARD).o flash.o plx9030.o
+OBJS = $(BOARD).o flash.o plx9030.o pd67290.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)
diff --git a/board/cpc45/cpc45.c b/board/cpc45/cpc45.c
index 92ccd42..51b0085 100644
--- a/board/cpc45/cpc45.c
+++ b/board/cpc45/cpc45.c
@@ -24,11 +24,13 @@
#include <common.h>
#include <mpc824x.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <pci.h>
#include <i2c.h>
int sysControlDisplay(int digit, uchar ascii_code);
extern void Plx9030Init(void);
+extern void SPD67290Init(void);
/* We have to clear the initial data area here. Couldn't have done it
* earlier because DRAM had not been initialized.
@@ -180,6 +182,10 @@
pci_cfgfunc_config_device, { PCI_PLX9030_IOADDR,
PCI_PLX9030_MEMADDR,
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+ { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0E, PCI_ANY_ID,
+ pci_cfgfunc_config_device, { PCMCIA_IO_BASE,
+ PCMCIA_IO_BASE,
+ PCI_COMMAND_MEMORY | PCI_COMMAND_IO }},
#endif /*CONFIG_PCI_PNP*/
{ }
};
@@ -233,3 +239,37 @@
return (0);
}
+
+#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+
+#ifdef CFG_PCMCIA_MEM_ADDR
+volatile unsigned char *pcmcia_mem = (unsigned char*)CFG_PCMCIA_MEM_ADDR;
+#endif
+
+int pcmcia_init(void)
+{
+ u_int rc;
+
+ debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
+
+ rc = i82365_init();
+
+ return rc;
+}
+
+#endif /* CFG_CMD_PCMCIA */
+
+# ifdef CONFIG_IDE_LED
+void ide_led (uchar led, uchar status)
+{
+ u_char val;
+ /* We have one PCMCIA slot and use LED H4 for the IDE Interface */
+ val = readb(BCSR_BASE + 0x04);
+ if (status) { /* led on */
+ val |= B_CTRL_LED0;
+ } else {
+ val &= ~B_CTRL_LED0;
+ }
+ writeb(val, BCSR_BASE + 0x04);
+}
+# endif
diff --git a/board/cpc45/pd67290.c b/board/cpc45/pd67290.c
new file mode 100644
index 0000000..c84fbae
--- /dev/null
+++ b/board/cpc45/pd67290.c
@@ -0,0 +1,68 @@
+/* pd67290.c - system configuration module for SPD67290
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * (C) 2004 DENX Software Engineering, Heiko Schocher <hs@denx.de>
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <net.h>
+#include <asm/io.h>
+#include <pci.h>
+
+/* imports */
+#include <mpc824x.h>
+
+static struct pci_device_id supported[] = {
+ {PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6729},
+ {}
+};
+
+/***************************************************************************
+*
+* SPD67290Init -
+*
+* RETURNS: -1 on error, 0 if OK
+*/
+
+int SPD67290Init (void)
+{
+ pci_dev_t devno;
+ int idx = 0; /* general index */
+ ulong membaseCsr; /* base address of device memory space */
+
+ /* find PD67290 device */
+ if ((devno = pci_find_devices (supported, idx++)) < 0) {
+ printf ("No PD67290 device found !!\n");
+ return -1;
+ }
+ /* - 0xfe000000 see MPC 8245 Users Manual Adress Map B */
+ membaseCsr = PCMCIA_IO_BASE - 0xfe000000;
+
+ /* set base address */
+ pci_write_config_dword (devno, PCI_BASE_ADDRESS_0, membaseCsr);
+
+ /* enable mapped memory and IO addresses */
+ pci_write_config_dword (devno,
+ PCI_COMMAND,
+ PCI_COMMAND_MEMORY |
+ PCI_COMMAND_IO | PCI_COMMAND_WAIT);
+ return 0;
+}