Squashed 'dts/upstream/' content from commit aaba2d45dc2a
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diff --git a/src/arm64/marvell/cn9132-db.dts b/src/arm64/marvell/cn9132-db.dts
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+++ b/src/arm64/marvell/cn9132-db.dts
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Marvell International Ltd.
+ *
+ * Device tree for the CN9132-DB board.
+ */
+
+#include "cn9132-db.dtsi"
+
+/ {
+ model = "Marvell Armada CN9132-DB setup A";
+};
+
+/* Setup A has SPI1 flash as a boot device, while setup B uses NAND flash.
+ * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
+ * simultaneously. When SPI controller is enabled, NAND should be disabled.
+ */
+
+&cp0_spi1 {
+ status = "okay";
+};
+