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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/cirrus,cs42l42.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic CS42L42 audio CODEC
+
+maintainers:
+ - patches@opensource.cirrus.com
+
+description:
+ The CS42L42 is a low-power audio codec designed for portable applications.
+ It provides a high-dynamic range, stereo DAC for audio playback and a mono
+ high-dynamic-range ADC for audio capture. There is an integrated headset
+ detection block.
+
+properties:
+ compatible:
+ enum:
+ - cirrus,cs42l42
+ - cirrus,cs42l83
+
+ reg:
+ description:
+ The I2C address of the CS42L42.
+ maxItems: 1
+
+ VP-supply:
+ description:
+ VP power supply.
+
+ VCP-supply:
+ description:
+ Charge pump power supply.
+
+ VD_FILT-supply:
+ description:
+ FILT+ power supply.
+
+ VL-supply:
+ description:
+ Logic power supply.
+
+ VA-supply:
+ description:
+ Analog power supply.
+
+ reset-gpios:
+ description:
+ This pin will be asserted and then deasserted to reset the
+ CS42L42 before communication starts.
+ maxItems: 1
+
+ interrupts:
+ description:
+ Interrupt for CS42L42 IRQ line.
+ maxItems: 1
+
+ cirrus,ts-inv:
+ description: |
+ Sets the behaviour of the jack plug detect switch.
+
+ 0 - (Default) Shorted to tip when unplugged, open when plugged.
+ This is "inverted tip sense (ITS)" in the datasheet.
+
+ 1 - Open when unplugged, shorted to tip when plugged.
+ This is "normal tip sense (TS)" in the datasheet.
+
+ The CS42L42_TS_INV_* defines are available for this.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 1
+
+ cirrus,ts-dbnc-rise:
+ description: |
+ Debounce the rising edge of TIP_SENSE_PLUG. With no
+ debounce, the tip sense pin might be noisy on a plug event.
+
+ 0 - 0ms
+ 1 - 125ms
+ 2 - 250ms
+ 3 - 500ms
+ 4 - 750ms
+ 5 - 1s (Default)
+ 6 - 1.25s
+ 7 - 1.5s
+
+ The CS42L42_TS_DBNCE_* defines are available for this.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 7
+
+ cirrus,ts-dbnc-fall:
+ description: |
+ Debounce the falling edge of TIP_SENSE_UNPLUG. With no
+ debounce, the tip sense pin might be noisy on an unplug event.
+
+ 0 - 0ms
+ 1 - 125ms
+ 2 - 250ms
+ 3 - 500ms
+ 4 - 750ms
+ 5 - 1s (Default)
+ 6 - 1.25s
+ 7 - 1.5s
+
+ The CS42L42_TS_DBNCE_* defines are available for this.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 7
+
+ cirrus,btn-det-init-dbnce:
+ description: |
+ This sets how long to wait after enabling button detection
+ interrupts before servicing button interrupts, to allow the
+ HS bias time to settle. Value is in milliseconds.
+ There may be erroneous button interrupts if this debounce time
+ is too short.
+
+ 0ms - 200ms,
+ Default = 100ms
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 200
+
+ cirrus,btn-det-event-dbnce:
+ description: |
+ This sets how long to wait after receiving a button press
+ interrupt before processing it. Allows time for the button
+ press to make a clean connection with the bias resistors.
+ Value is in milliseconds.
+
+ 0ms - 20ms,
+ Default = 10ms
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 20
+
+ cirrus,bias-lvls:
+ description: |
+ For a level-detect headset button scheme, each button will bias
+ the mic pin to a certain voltage. To determine which button was
+ pressed, the voltage is compared to sequential, decreasing
+ voltages, until the compared voltage < bias voltage.
+ For different hardware setups, a designer might want to tweak this.
+ This is an array of descending values for the comparator voltage,
+ given as percent of the HSBIAS voltage.
+
+ Array of 4 values, each 0-63
+ < x1 x2 x3 x4 >
+ Default = < 15 8 4 1 >
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 4
+ maxItems: 4
+ items:
+ minimum: 0
+ maximum: 63
+
+ cirrus,hs-bias-ramp-rate:
+ description: |
+ If present this sets the rate that the HS bias should rise and fall.
+ The actual rise and fall times depend on external hardware (the
+ datasheet gives several rise and fall time examples).
+
+ 0 - Fast rise time; slow, load-dependent fall time
+ 1 - Fast
+ 2 - Slow (default)
+ 3 - Slowest
+
+ The CS42L42_HSBIAS_RAMP_* defines are available for this.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 3
+
+ cirrus,hs-bias-sense-disable:
+ description: |
+ If present the HSBIAS sense is disabled. Configures HSBIAS output
+ current sense through the external 2.21-k resistor. HSBIAS_SENSE
+ is a hardware feature to reduce the potential pop noise when the
+ headset plug is removed slowly. But on some platforms ESD voltage
+ will affect it causing plug detection to fail, especially with CTIA
+ headset type. For different hardware setups, a designer might want
+ to tweak default behavior.
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - VP-supply
+ - VCP-supply
+ - VD_FILT-supply
+ - VL-supply
+ - VA-supply
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/sound/cs42l42.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cs42l42: cs42l42@48 {
+ compatible = "cirrus,cs42l42";
+ reg = <0x48>;
+ VA-supply = <&dummy_vreg>;
+ VP-supply = <&dummy_vreg>;
+ VCP-supply = <&dummy_vreg>;
+ VD_FILT-supply = <&dummy_vreg>;
+ VL-supply = <&dummy_vreg>;
+
+ reset-gpios = <&axi_gpio_0 1 0>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <55 8>;
+
+ cirrus,ts-inv = <CS42L42_TS_INV_DIS>;
+ cirrus,ts-dbnc-rise = <CS42L42_TS_DBNCE_1000>;
+ cirrus,ts-dbnc-fall = <CS42L42_TS_DBNCE_0>;
+ cirrus,btn-det-init-dbnce = <100>;
+ cirrus,btn-det-event-dbnce = <10>;
+ cirrus,bias-lvls = <0x0F 0x08 0x04 0x01>;
+ cirrus,hs-bias-ramp-rate = <CS42L42_HSBIAS_RAMP_SLOW>;
+ };
+ };