Squashed 'dts/upstream/' content from commit aaba2d45dc2a
git-subtree-dir: dts/upstream
git-subtree-split: aaba2d45dc2a1b3bbb710f2a3808ee1c9f340abe
diff --git a/Bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml b/Bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml
new file mode 100644
index 0000000..73438d8
--- /dev/null
+++ b/Bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml
@@ -0,0 +1,124 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/allwinner,sun8i-a83t-usb-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A83t USB PHY
+
+maintainers:
+ - Chen-Yu Tsai <wens@csie.org>
+ - Maxime Ripard <mripard@kernel.org>
+
+properties:
+ "#phy-cells":
+ const: 1
+
+ compatible:
+ const: allwinner,sun8i-a83t-usb-phy
+
+ reg:
+ items:
+ - description: PHY Control registers
+ - description: PHY PMU1 registers
+ - description: PHY PMU2 registers
+
+ reg-names:
+ items:
+ - const: phy_ctrl
+ - const: pmu1
+ - const: pmu2
+
+ clocks:
+ items:
+ - description: USB OTG PHY bus clock
+ - description: USB Host 0 PHY bus clock
+ - description: USB Host 1 PHY bus clock
+ - description: USB HSIC 12MHz clock
+
+ clock-names:
+ items:
+ - const: usb0_phy
+ - const: usb1_phy
+ - const: usb2_phy
+ - const: usb2_hsic_12M
+
+ resets:
+ items:
+ - description: USB OTG reset
+ - description: USB Host 1 Controller reset
+ - description: USB Host 2 Controller reset
+
+ reset-names:
+ items:
+ - const: usb0_reset
+ - const: usb1_reset
+ - const: usb2_reset
+
+ usb0_id_det-gpios:
+ maxItems: 1
+ description: GPIO to the USB OTG ID pin
+
+ usb0_vbus_det-gpios:
+ maxItems: 1
+ description: GPIO to the USB OTG VBUS detect pin
+
+ usb0_vbus_power-supply:
+ description: Power supply to detect the USB OTG VBUS
+
+ usb0_vbus-supply:
+ description: Regulator controlling USB OTG VBUS
+
+ usb1_vbus-supply:
+ description: Regulator controlling USB1 Host controller
+
+ usb2_vbus-supply:
+ description: Regulator controlling USB2 Host controller
+
+required:
+ - "#phy-cells"
+ - compatible
+ - clocks
+ - clock-names
+ - reg
+ - reg-names
+ - resets
+ - reset-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/clock/sun8i-a83t-ccu.h>
+ #include <dt-bindings/reset/sun8i-a83t-ccu.h>
+
+ phy@1c19400 {
+ #phy-cells = <1>;
+ compatible = "allwinner,sun8i-a83t-usb-phy";
+ reg = <0x01c19400 0x10>,
+ <0x01c1a800 0x14>,
+ <0x01c1b800 0x14>;
+ reg-names = "phy_ctrl",
+ "pmu1",
+ "pmu2";
+ clocks = <&ccu CLK_USB_PHY0>,
+ <&ccu CLK_USB_PHY1>,
+ <&ccu CLK_USB_HSIC>,
+ <&ccu CLK_USB_HSIC_12M>;
+ clock-names = "usb0_phy",
+ "usb1_phy",
+ "usb2_phy",
+ "usb2_hsic_12M";
+ resets = <&ccu RST_USB_PHY0>,
+ <&ccu RST_USB_PHY1>,
+ <&ccu RST_USB_HSIC>;
+ reset-names = "usb0_reset",
+ "usb1_reset",
+ "usb2_reset";
+ usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+ usb0_vbus_power-supply = <&usb_power_supply>;
+ usb0_vbus-supply = <®_drivevbus>;
+ usb1_vbus-supply = <®_usb1_vbus>;
+ usb2_vbus-supply = <®_usb2_vbus>;
+ };