| commit | 5348432f51cce37e1ab41fb2a831df5a392146a2 | [log] [tgz] |
|---|---|---|
| author | Xie Xiaobo <r63061@freescale.com> | Fri Mar 09 19:08:25 2007 +0800 |
| committer | Kim Phillips <kim.phillips@freescale.com> | Thu Apr 12 17:39:03 2007 -0500 |
| tree | 592fb707b77e2a37a5259119149566192a7d7e49 | |
| parent | 6d39b5565ff4448804fcc16d5ebc78aa063cd130 [diff] |
Fix two bugs for MPC83xx DDR2 controller SPD Init There are a few bugs in the cpu/mpc83xx/spd_sdram.c the first bug is that the picos_to_clk routine introduces a huge rounding error in 83xx. the second bug is that the mode register write recovery field is tWR-1, not tWR >> 1.