configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 2f69683..4ec953a 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -9,6 +9,7 @@
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -21,7 +22,6 @@
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
@@ -42,6 +42,7 @@
CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
@@ -54,12 +55,11 @@
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
-CONFIG_DM=y
+CONFIG_MII=y
+CONFIG_TSEC_ENET=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
-CONFIG_MII=y
-CONFIG_TSEC_ENET=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y