ColdFire: Add dspi and serial flash support for MCF5445x

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
diff --git a/include/asm-m68k/coldfire/dspi.h b/include/asm-m68k/coldfire/dspi.h
index 3c579d3..8327e1b 100644
--- a/include/asm-m68k/coldfire/dspi.h
+++ b/include/asm-m68k/coldfire/dspi.h
@@ -64,10 +64,15 @@
 #define DSPI_DMCR_CTXF			(0x00000800)
 #define DSPI_DMCR_DRXF			(0x00001000)
 #define DSPI_DMCR_DTXF			(0x00002000)
+#define DSPI_DMCR_MDIS			(0x00004000)
 #define DSPI_DMCR_CSIS0			(0x00010000)
+#define DSPI_DMCR_CSIS1			(0x00020000)
 #define DSPI_DMCR_CSIS2			(0x00040000)
 #define DSPI_DMCR_CSIS3			(0x00080000)
+#define DSPI_DMCR_CSIS4			(0x00100000)
 #define DSPI_DMCR_CSIS5			(0x00200000)
+#define DSPI_DMCR_CSIS6			(0x00400000)
+#define DSPI_DMCR_CSIS7			(0x00800000)
 #define DSPI_DMCR_ROOE			(0x01000000)
 #define DSPI_DMCR_PCSSE			(0x02000000)
 #define DSPI_DMCR_MTFE			(0x04000000)
@@ -92,6 +97,7 @@
 #define DSPI_DCTAR_CPHA			(0x02000000)
 #define DSPI_DCTAR_CPOL			(0x04000000)
 #define DSPI_DCTAR_TRSZ(x)		(((x)&0x0000000F)<<27)
+#define DSPI_DCTAR_DBR			(0x80000000)
 #define DSPI_DCTAR_PCSSCK_1CLK		(0x00000000)
 #define DSPI_DCTAR_PCSSCK_3CLK		(0x00400000)
 #define DSPI_DCTAR_PCSSCK_5CLK		(0x00800000)
@@ -153,4 +159,8 @@
 /* Bit definitions and macros for DRFDR group */
 #define DSPI_DRFDR_RXDATA(x)		(((x)&0x0000FFFF))
 
+void dspi_init(void);
+void dspi_tx(int chipsel, u8 attrib, u16 data);
+u16 dspi_rx(void);
+
 #endif				/* __DSPI_H__ */
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index 5f55761..f33ccb0 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -171,6 +171,10 @@
 #define CFG_I2C_OFFSET		0x58000
 #define CFG_IMMR		CFG_MBAR
 
+/* DSPI and Serial Flash */
+#define CONFIG_CF_DSPI
+#define CONFIG_SERIAL_FLASH
+
 /* PCI */
 #ifdef CONFIG_CMD_PCI
 #define CONFIG_PCI		1
@@ -309,7 +313,7 @@
 
 #else
 
-#	define CFG_MAX_FLASH_BANKS	2	/* max number of memory banks */
+#	define CFG_MAX_FLASH_BANKS	3	/* max number of memory banks */
 
 #	define CFG_ATMEL_REGION		4
 #	define CFG_ATMEL_TOTALSECT	11
@@ -326,6 +330,28 @@
 #	define CFG_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */
 #	define CFG_FLASH_CHECKSUM
 
+#ifdef CONFIG_SERIAL_FLASH
+#	define CFG_FLASH2_BASE		0x01000000
+#	define CFG_STM_SECT		32
+#	define CFG_STM_SECTSZ		0x10000
+
+#	undef CFG_FLASH_ERASE_TOUT
+#	define CFG_FLASH_ERASE_TOUT	20000
+
+#	define SER_WREN			0x06
+#	define SER_WRDI			0x04
+#	define SER_RDID			0x9F
+#	define SER_RDSR			0x05
+#	define SER_WRSR			0x01
+#	define SER_READ			0x03
+#	define SER_F_READ		0x0B
+#	define SER_PAGE_PROG		0x02
+#	define SER_SECT_ERASE		0xD8
+#	define SER_BULK_ERASE		0xC7
+#	define SER_DEEP_PWRDN		0xB9
+#	define SER_RES			0xAB
+#endif
+
 #endif
 
 /*