| commit | 51f9e72306b04dbd00bea80055e2900ae191c0ce | [log] [tgz] |
|---|---|---|
| author | Stephen Warren <swarren@nvidia.com> | Tue Feb 24 14:08:29 2015 -0700 |
| committer | Tom Warren <twarren@nvidia.com> | Wed Mar 04 10:09:01 2015 -0700 |
| tree | a93d85ab77323e2d6536a324c3ee84c1ae2685ad | |
| parent | 97f9c6862dea218b4d6fd786f5fe431248d400c1 [diff] |
ARM: tegra: pinmux: account for different drivegroup base registers Tegra210 starts its drive group registers at a different offset from the APB MISC register block that other SoCs. Update the code to handle this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>