armv8: s32v234: Introduce basic support for s32v234evb
Add initial support for NXP's S32V234 SoC and S32V234EVB board.
The S32V230 family is designed to support computation-intensive applications
for image processing. The S32V234, as part of the S32V230 family, is a
high-performance automotive processor designed to support safe
computation-intensive applications in the area of vision and sensor fusion.
Code originally writen by:
Original-signed-off-by: Stoica Cosmin-Stefan <cosminstefan.stoica@freescale.com>
Original-signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Original-signed-off-by: Eddy Petrișor <eddy.petrisor@gmail.com>
Signed-off-by: Eddy Petrișor <eddy.petrisor@nxp.com>
diff --git a/arch/arm/cpu/armv8/s32v234/cpu.c b/arch/arm/cpu/armv8/s32v234/cpu.c
new file mode 100644
index 0000000..dac12a2
--- /dev/null
+++ b/arch/arm/cpu/armv8/s32v234/cpu.c
@@ -0,0 +1,97 @@
+/*
+ * (C) Copyright 2014-2016, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/armv8/mmu.h>
+#include <asm/io.h>
+#include <asm/arch/mc_me_regs.h>
+#include "cpu.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 cpu_mask(void)
+{
+ return readl(MC_ME_CS);
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+
+#define S32V234_IRAM_BASE 0x3e800000UL
+#define S32V234_IRAM_SIZE 0x800000UL
+#define S32V234_DRAM_BASE1 0x80000000UL
+#define S32V234_DRAM_SIZE1 0x40000000UL
+#define S32V234_DRAM_BASE2 0xC0000000UL
+#define S32V234_DRAM_SIZE2 0x20000000UL
+#define S32V234_PERIPH_BASE 0x40000000UL
+#define S32V234_PERIPH_SIZE 0x40000000UL
+
+static struct mm_region s32v234_mem_map[] = {
+ {
+ .base = S32V234_IRAM_BASE,
+ .size = S32V234_IRAM_SIZE,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_OUTER_SHARE
+ }, {
+ .base = S32V234_DRAM_BASE1,
+ .size = S32V234_DRAM_SIZE1,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_OUTER_SHARE
+ }, {
+ .base = S32V234_PERIPH_BASE,
+ .size = S32V234_PERIPH_SIZE,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE
+ /* TODO: Do we need these? */
+ /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */
+ }, {
+ .base = S32V234_DRAM_BASE2,
+ .size = S32V234_DRAM_SIZE2,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
+ PTE_BLOCK_OUTER_SHARE
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = s32v234_mem_map;
+
+#endif
+
+/*
+ * Return the number of cores on this SOC.
+ */
+int cpu_numcores(void)
+{
+ int numcores;
+ u32 mask;
+
+ mask = cpu_mask();
+ numcores = hweight32(cpu_mask());
+
+ /* Verify if M4 is deactivated */
+ if (mask & 0x1)
+ numcores--;
+
+ return numcores;
+}
+
+#if defined(CONFIG_ARCH_EARLY_INIT_R)
+int arch_early_init_r(void)
+{
+ int rv;
+ asm volatile ("dsb sy");
+ rv = fsl_s32v234_wake_seconday_cores();
+
+ if (rv)
+ printf("Did not wake secondary cores\n");
+
+ asm volatile ("sev");
+ return 0;
+}
+#endif /* CONFIG_ARCH_EARLY_INIT_R */