keystone: ddr3: add ddr3.h to hold ddr3 API
It's convinient to hold ddr3 function definitions in separate file
such as ddr3.h. So move this from hardware.h to ddr3.h.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
diff --git a/board/ti/k2hk_evm/board.c b/board/ti/k2hk_evm/board.c
index ef90f9d..f910ebe 100644
--- a/board/ti/k2hk_evm/board.c
+++ b/board/ti/k2hk_evm/board.c
@@ -12,6 +12,7 @@
#include <fdt_support.h>
#include <libfdt.h>
+#include <asm/arch/ddr3.h>
#include <asm/arch/hardware.h>
#include <asm/arch/clock.h>
#include <asm/io.h>
@@ -63,7 +64,7 @@
int dram_init(void)
{
- init_ddr3();
+ ddr3_init();
gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
diff --git a/board/ti/k2hk_evm/ddr3.c b/board/ti/k2hk_evm/ddr3.c
index 6092eb8..0085f29 100644
--- a/board/ti/k2hk_evm/ddr3.c
+++ b/board/ti/k2hk_evm/ddr3.c
@@ -8,6 +8,7 @@
*/
#include <common.h>
+#include <asm/arch/ddr3.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
#include <i2c.h>
@@ -228,7 +229,7 @@
struct pll_init_data ddr3a_400 = DDR3_PLL_400(A);
struct pll_init_data ddr3b_400 = DDR3_PLL_400(B);
-void init_ddr3(void)
+void ddr3_init(void)
{
char dimm_name[32];
@@ -239,22 +240,26 @@
if (!strcmp(dimm_name, "18KSF1G72HZ-1G6E2 ")) {
init_pll(&ddr3a_400);
if (cpu_revision() > 0) {
- init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1600_64A);
- init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_64);
+ ddr3_init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1600_64A);
+ ddr3_init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE,
+ &ddr3_1600_64);
printf("DRAM: Capacity 8 GiB (includes reported below)\n");
} else {
- init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1600_32);
- init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_32);
+ ddr3_init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1600_32);
+ ddr3_init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE,
+ &ddr3_1600_32);
printf("DRAM: Capacity 4 GiB (includes reported below)\n");
}
} else if (!strcmp(dimm_name, "SQR-SD3T-2G1333SED")) {
init_pll(&ddr3a_333);
if (cpu_revision() > 0) {
- init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1333_64A);
- init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE, &ddr3_1333_64);
+ ddr3_init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1333_64A);
+ ddr3_init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE,
+ &ddr3_1333_64);
} else {
- init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1333_32);
- init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE, &ddr3_1333_32);
+ ddr3_init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1333_32);
+ ddr3_init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE,
+ &ddr3_1333_32);
}
} else {
printf("Unknown SO-DIMM. Cannot configure DDR3\n");
@@ -263,6 +268,6 @@
}
init_pll(&ddr3b_333);
- init_ddrphy(K2HK_DDR3B_DDRPHYC, &ddr3phy_1333_64);
- init_ddremif(K2HK_DDR3B_EMIF_CTRL_BASE, &ddr3_1333_64);
+ ddr3_init_ddrphy(K2HK_DDR3B_DDRPHYC, &ddr3phy_1333_64);
+ ddr3_init_ddremif(K2HK_DDR3B_EMIF_CTRL_BASE, &ddr3_1333_64);
}