pinctrl: qcom: move out of mach-snapdragon
Move the Qualcomm pinctrl drivers out of mach-snapdragon and over to the
rest of the pinctrl drivers, adjust the drivers so that support for each
platform can be enabled/disabled individually and introduce platform
specific configuration options.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig
index dde37ec..3c9f3be 100644
--- a/arch/arm/mach-snapdragon/Kconfig
+++ b/arch/arm/mach-snapdragon/Kconfig
@@ -16,6 +16,7 @@
bool "Qualcomm Snapdragon 845 SoC"
select LINUX_KERNEL_IMAGE_HEADER
imply CLK_QCOM_SDM845
+ imply PINCTRL_QCOM_SDM845
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
default 0x80000000
@@ -28,6 +29,7 @@
select BOARD_LATE_INIT
select ENABLE_ARM_SOC_BOOT0_HOOK
imply CLK_QCOM_APQ8016
+ imply PINCTRL_QCOM_APQ8016
help
Support for 96Boards Dragonboard 410C. This board complies with
96Board Open Platform Specifications. Features:
@@ -42,6 +44,7 @@
config TARGET_DRAGONBOARD820C
bool "96Boards Dragonboard 820C"
imply CLK_QCOM_APQ8096
+ imply PINCTRL_QCOM_APQ8096
help
Support for 96Boards Dragonboard 820C. This board complies with
96Board Open Platform Specifications. Features:
@@ -76,6 +79,7 @@
bool "Qualcomm Technologies, Inc. QCS404 EVB"
select LINUX_KERNEL_IMAGE_HEADER
imply CLK_QCOM_QCS404
+ imply PINCTRL_QCOM_QCS404
help
Support for Qualcomm Technologies, Inc. QCS404 evaluation board.
Features:
diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile
index 497ee35..3a3a297 100644
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -8,9 +8,4 @@
obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o
obj-y += misc.o
obj-y += dram.o
-obj-y += pinctrl-snapdragon.o
-obj-y += pinctrl-apq8016.o
-obj-y += pinctrl-apq8096.o
-obj-y += pinctrl-qcs404.o
-obj-y += pinctrl-sdm845.o
obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o
diff --git a/arch/arm/mach-snapdragon/pinctrl-apq8016.c b/arch/arm/mach-snapdragon/pinctrl-apq8016.c
deleted file mode 100644
index 70c0be0..0000000
--- a/arch/arm/mach-snapdragon/pinctrl-apq8016.c
+++ /dev/null
@@ -1,61 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Qualcomm APQ8016 pinctrl
- *
- * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
- *
- */
-
-#include "pinctrl-snapdragon.h"
-#include <common.h>
-
-#define MAX_PIN_NAME_LEN 32
-static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
-static const char * const msm_pinctrl_pins[] = {
- "SDC1_CLK",
- "SDC1_CMD",
- "SDC1_DATA",
- "SDC2_CLK",
- "SDC2_CMD",
- "SDC2_DATA",
- "QDSD_CLK",
- "QDSD_CMD",
- "QDSD_DATA0",
- "QDSD_DATA1",
- "QDSD_DATA2",
- "QDSD_DATA3",
-};
-
-static const struct pinctrl_function msm_pinctrl_functions[] = {
- {"blsp1_uart", 2},
-};
-
-static const char *apq8016_get_function_name(struct udevice *dev,
- unsigned int selector)
-{
- return msm_pinctrl_functions[selector].name;
-}
-
-static const char *apq8016_get_pin_name(struct udevice *dev,
- unsigned int selector)
-{
- if (selector < 122) {
- snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
- return pin_name;
- } else {
- return msm_pinctrl_pins[selector - 122];
- }
-}
-
-static unsigned int apq8016_get_function_mux(unsigned int selector)
-{
- return msm_pinctrl_functions[selector].val;
-}
-
-struct msm_pinctrl_data apq8016_data = {
- .pin_count = 133,
- .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
- .get_function_name = apq8016_get_function_name,
- .get_function_mux = apq8016_get_function_mux,
- .get_pin_name = apq8016_get_pin_name,
-};
diff --git a/arch/arm/mach-snapdragon/pinctrl-apq8096.c b/arch/arm/mach-snapdragon/pinctrl-apq8096.c
deleted file mode 100644
index 45462f0..0000000
--- a/arch/arm/mach-snapdragon/pinctrl-apq8096.c
+++ /dev/null
@@ -1,56 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Qualcomm APQ8096 pinctrl
- *
- * (C) Copyright 2019 Ramon Fried <ramon.fried@gmail.com>
- *
- */
-
-#include "pinctrl-snapdragon.h"
-#include <common.h>
-
-#define MAX_PIN_NAME_LEN 32
-static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
-static const char * const msm_pinctrl_pins[] = {
- "SDC1_CLK",
- "SDC1_CMD",
- "SDC1_DATA",
- "SDC2_CLK",
- "SDC2_CMD",
- "SDC2_DATA",
- "SDC1_RCLK",
-};
-
-static const struct pinctrl_function msm_pinctrl_functions[] = {
- {"blsp_uart8", 2},
-};
-
-static const char *apq8096_get_function_name(struct udevice *dev,
- unsigned int selector)
-{
- return msm_pinctrl_functions[selector].name;
-}
-
-static const char *apq8096_get_pin_name(struct udevice *dev,
- unsigned int selector)
-{
- if (selector < 150) {
- snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
- return pin_name;
- } else {
- return msm_pinctrl_pins[selector - 150];
- }
-}
-
-static unsigned int apq8096_get_function_mux(unsigned int selector)
-{
- return msm_pinctrl_functions[selector].val;
-}
-
-struct msm_pinctrl_data apq8096_data = {
- .pin_count = 157,
- .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
- .get_function_name = apq8096_get_function_name,
- .get_function_mux = apq8096_get_function_mux,
- .get_pin_name = apq8096_get_pin_name,
-};
diff --git a/arch/arm/mach-snapdragon/pinctrl-qcs404.c b/arch/arm/mach-snapdragon/pinctrl-qcs404.c
deleted file mode 100644
index a6e53c4..0000000
--- a/arch/arm/mach-snapdragon/pinctrl-qcs404.c
+++ /dev/null
@@ -1,68 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Qualcomm QCS404 pinctrl
- *
- * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
- */
-
-#include "pinctrl-snapdragon.h"
-#include <common.h>
-
-#define MAX_PIN_NAME_LEN 32
-static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
-static const char * const msm_pinctrl_pins[] = {
- "SDC1_RCLK",
- "SDC1_CLK",
- "SDC1_CMD",
- "SDC1_DATA",
- "SDC2_CLK",
- "SDC2_CMD",
- "SDC2_DATA",
-};
-
-static const struct pinctrl_function msm_pinctrl_functions[] = {
- {"blsp_uart2", 1},
- {"rgmii_int", 1},
- {"rgmii_ck", 1},
- {"rgmii_tx", 1},
- {"rgmii_ctl", 1},
- {"rgmii_rx", 1},
- {"rgmii_mdio", 1},
- {"rgmii_mdc", 1},
- {"blsp_i2c0", 3},
- {"blsp_i2c1", 2},
- {"blsp_i2c_sda_a2", 3},
- {"blsp_i2c_scl_a2", 3},
- {"blsp_i2c3", 2},
- {"blsp_i2c4", 1},
-};
-
-static const char *qcs404_get_function_name(struct udevice *dev,
- unsigned int selector)
-{
- return msm_pinctrl_functions[selector].name;
-}
-
-static const char *qcs404_get_pin_name(struct udevice *dev,
- unsigned int selector)
-{
- if (selector < 120) {
- snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
- return pin_name;
- } else {
- return msm_pinctrl_pins[selector - 120];
- }
-}
-
-static unsigned int qcs404_get_function_mux(unsigned int selector)
-{
- return msm_pinctrl_functions[selector].val;
-}
-
-struct msm_pinctrl_data qcs404_data = {
- .pin_count = 126,
- .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
- .get_function_name = qcs404_get_function_name,
- .get_function_mux = qcs404_get_function_mux,
- .get_pin_name = qcs404_get_pin_name,
-};
diff --git a/arch/arm/mach-snapdragon/pinctrl-sdm845.c b/arch/arm/mach-snapdragon/pinctrl-sdm845.c
deleted file mode 100644
index 40f2f01..0000000
--- a/arch/arm/mach-snapdragon/pinctrl-sdm845.c
+++ /dev/null
@@ -1,44 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Qualcomm SDM845 pinctrl
- *
- * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
- *
- */
-
-#include "pinctrl-snapdragon.h"
-#include <common.h>
-
-#define MAX_PIN_NAME_LEN 32
-static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
-
-static const struct pinctrl_function msm_pinctrl_functions[] = {
- {"qup9", 1},
- {"gpio", 0},
-};
-
-static const char *sdm845_get_function_name(struct udevice *dev,
- unsigned int selector)
-{
- return msm_pinctrl_functions[selector].name;
-}
-
-static const char *sdm845_get_pin_name(struct udevice *dev,
- unsigned int selector)
-{
- snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
- return pin_name;
-}
-
-static unsigned int sdm845_get_function_mux(unsigned int selector)
-{
- return msm_pinctrl_functions[selector].val;
-}
-
-struct msm_pinctrl_data sdm845_data = {
- .pin_count = 150,
- .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
- .get_function_name = sdm845_get_function_name,
- .get_function_mux = sdm845_get_function_mux,
- .get_pin_name = sdm845_get_pin_name,
-};
diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
deleted file mode 100644
index 826dc51..0000000
--- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
+++ /dev/null
@@ -1,166 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * TLMM driver for Qualcomm APQ8016, APQ8096
- *
- * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
- *
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <asm/io.h>
-#include <dm/device_compat.h>
-#include <dm/lists.h>
-#include <dm/pinctrl.h>
-#include <linux/bitops.h>
-#include "pinctrl-snapdragon.h"
-
-struct msm_pinctrl_priv {
- phys_addr_t base;
- struct msm_pinctrl_data *data;
-};
-
-#define GPIO_CONFIG_OFFSET(x) ((x) * 0x1000)
-#define TLMM_GPIO_PULL_MASK GENMASK(1, 0)
-#define TLMM_FUNC_SEL_MASK GENMASK(5, 2)
-#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6)
-#define TLMM_GPIO_DISABLE BIT(9)
-
-static const struct pinconf_param msm_conf_params[] = {
- { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 2 },
- { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
- { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 3 },
-};
-
-static int msm_get_functions_count(struct udevice *dev)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- return priv->data->functions_count;
-}
-
-static int msm_get_pins_count(struct udevice *dev)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- return priv->data->pin_count;
-}
-
-static const char *msm_get_function_name(struct udevice *dev,
- unsigned int selector)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- return priv->data->get_function_name(dev, selector);
-}
-
-static int msm_pinctrl_probe(struct udevice *dev)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- priv->base = dev_read_addr(dev);
- priv->data = (struct msm_pinctrl_data *)dev->driver_data;
-
- return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
-}
-
-static const char *msm_get_pin_name(struct udevice *dev, unsigned int selector)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- return priv->data->get_pin_name(dev, selector);
-}
-
-static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector,
- unsigned int func_selector)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
- TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE,
- priv->data->get_function_mux(func_selector) << 2);
- return 0;
-}
-
-static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector,
- unsigned int param, unsigned int argument)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- switch (param) {
- case PIN_CONFIG_DRIVE_STRENGTH:
- argument = (argument / 2) - 1;
- clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
- TLMM_DRV_STRENGTH_MASK, argument << 6);
- break;
- case PIN_CONFIG_BIAS_DISABLE:
- clrbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
- TLMM_GPIO_PULL_MASK);
- break;
- case PIN_CONFIG_BIAS_PULL_UP:
- clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
- TLMM_GPIO_PULL_MASK, argument);
- break;
- default:
- return 0;
- }
-
- return 0;
-}
-
-static struct pinctrl_ops msm_pinctrl_ops = {
- .get_pins_count = msm_get_pins_count,
- .get_pin_name = msm_get_pin_name,
- .set_state = pinctrl_generic_set_state,
- .pinmux_set = msm_pinmux_set,
- .pinconf_num_params = ARRAY_SIZE(msm_conf_params),
- .pinconf_params = msm_conf_params,
- .pinconf_set = msm_pinconf_set,
- .get_functions_count = msm_get_functions_count,
- .get_function_name = msm_get_function_name,
-};
-
-static int msm_pinctrl_bind(struct udevice *dev)
-{
- ofnode node = dev_ofnode(dev);
- const char *name;
- int ret;
-
- ofnode_get_property(node, "gpio-controller", &ret);
- if (ret < 0)
- return 0;
-
- /* Get the name of gpio node */
- name = ofnode_get_name(node);
- if (!name)
- return -EINVAL;
-
- /* Bind gpio node */
- ret = device_bind_driver_to_node(dev, "gpio_msm",
- name, node, NULL);
- if (ret)
- return ret;
-
- dev_dbg(dev, "bind %s\n", name);
-
- return 0;
-}
-
-static const struct udevice_id msm_pinctrl_ids[] = {
- { .compatible = "qcom,msm8916-pinctrl", .data = (ulong)&apq8016_data },
- { .compatible = "qcom,msm8996-pinctrl", .data = (ulong)&apq8096_data },
- { .compatible = "qcom,sdm845-pinctrl", .data = (ulong)&sdm845_data },
- { .compatible = "qcom,qcs404-pinctrl", .data = (ulong)&qcs404_data },
- { }
-};
-
-U_BOOT_DRIVER(pinctrl_snapdraon) = {
- .name = "pinctrl_msm",
- .id = UCLASS_PINCTRL,
- .of_match = msm_pinctrl_ids,
- .priv_auto = sizeof(struct msm_pinctrl_priv),
- .ops = &msm_pinctrl_ops,
- .probe = msm_pinctrl_probe,
- .bind = msm_pinctrl_bind,
-};
diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h
deleted file mode 100644
index 178ee01..0000000
--- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Qualcomm Pin control
- *
- * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
- *
- */
-#ifndef _PINCTRL_SNAPDRAGON_H
-#define _PINCTRL_SNAPDRAGON_H
-
-struct udevice;
-
-struct msm_pinctrl_data {
- int pin_count;
- int functions_count;
- const char *(*get_function_name)(struct udevice *dev,
- unsigned int selector);
- unsigned int (*get_function_mux)(unsigned int selector);
- const char *(*get_pin_name)(struct udevice *dev,
- unsigned int selector);
-};
-
-struct pinctrl_function {
- const char *name;
- int val;
-};
-
-extern struct msm_pinctrl_data apq8016_data;
-extern struct msm_pinctrl_data apq8096_data;
-extern struct msm_pinctrl_data sdm845_data;
-extern struct msm_pinctrl_data qcs404_data;
-
-#endif